Abstract: An ESD protection device includes a substrate of a first conductivity type, a well region of a second conductivity type, a first doped region of the second conductivity type, a second doped region of the first conductivity type, a third doped region of the second conductivity type, a fourth doped region of the first conductivity type. The well region is configured in the substrate. The first doped region is configured in the well region. The second doped region is configured in the well region and surrounding the first doped region. The third doped region is configured in the well region and surrounding the first doped region and the second doped region. The fourth doped region is configured in the well region and under the first doped region and the second doped region. The fourth doped region is coupled with the first doped region and with the second doped region, respectively.

Abstract: A semiconductor device having a tunable capacitance is disclosed, comprising a substrate, a semiconductor base layer comprising a first semiconductor material having a first band-gap, and a plurality of successive semiconductor layers positioned between the substrate and the semiconductor base layer. The plurality of successive semiconductor layers includes a tuning layer comprising a second semiconductor material having a second band-gap larger than the first band-gap. Furthermore, the tuning layer has a non-uniform doping profile with doping concentration that varies in accordance with distance from a surface of the tuning layer proximal to the semiconductor base layer. The tunable capacitance of the semiconductor device varies in accordance with an applied voltage between the base layer and one of the successive semiconductor layers.

Abstract: A semiconductor device having a tunable capacitance is disclosed, comprising a substrate, a semiconductor base layer comprising a first semiconductor material having a first band-gap, and a plurality of successive semiconductor layers positioned between the substrate and the semiconductor base layer. The plurality of successive semiconductor layers includes a tuning layer comprising a second semiconductor material having a second band-gap larger than the first band-gap. Furthermore, the tuning layer has a non-uniform doping profile with doping concentration that varies in accordance with distance from a surface of the tuning layer proximal to the semiconductor base layer. The tunable capacitance of the semiconductor device varies in accordance with an applied voltage between the base layer and one of the successive semiconductor layers.

Abstract: A voltage multiplying circuit comprising: a first capacitor, comprising a first terminal and a second terminal, wherein the first terminal of the first capacitor is selectively coupled to a first voltage or a second voltage, and the second terminal is selectively coupled to the first voltage or a fourth voltage; a second capacitor, comprising a first terminal and a second terminal, wherein the first terminal of the second capacitor is selectively coupled to the second voltage or the fourth voltage, and the second terminal of the second capacitor is selectively coupled to a third voltage or the fourth voltage; and a third capacitor, comprising a first terminal and a second terminal, wherein the first terminal of the third capacitor is selectively coupled to the second voltage or the fourth voltage, and the second terminal of the third capacitor is selectively coupled to a third voltage or the fourth voltage.

Abstract: A method for image data compression of a to-be-encoded image block includes: determining one of a plurality of preset encoding modes as an encoding mode based upon attributes of pixels of the to-be-encoded image block; and compressing image data of the to-be-encoded image block according to the encoding mode thus determined so as to obtain encoded data.

Abstract: A display device includes a plurality of pixel circuits arranged in a plurality of rows and columns, a plurality of scan lines, a plurality of data lines, a scan driver operable to drive the rows of the pixel circuits in sequence via the scan lines, and a data driver coupled to the columns of the pixel circuits via the data lines. The scan lines include first and second sets of scan lines alternately disposed with each other. For each of the first and second sets of the scan lines, adjacent scan lines have different circuit properties. The scan driver activates each of the scan lines for a respective activation time period according to the circuit property thereof.

Abstract: A backlight driving circuit includes a scan driver operatively associated with pixel circuits in a matrix formation, and a backlight driver. The scan driver activates the pixel circuits in a row-by-row manner within a frame interval for provision of data voltages to the pixel circuits in each row of the matrix formation, respectively. The backlight driver adjusts a duty cycle of a backlight driving signal for a backlight source such that the backlight source is deactivated when at least one of the pixel circuits is yet to be activated within the frame interval, and adjusts the duty cycle to gradually increase brightness of light output from the backlight source when all of the pixel circuits have been activated within the frame interval.

Abstract: A low-profile large current inductor includes an iron core having an expanded upper part, an expanded lower part, a core shank connected between the expanded upper part and the expanded lower part, two wire-mounting grooves extending across the bottom wall of the expanded lower part in a parallel manner and four arched notches respectively located on the expanded lower part at each of two distal ends of each of the two wire-mounting grooves, a winding wound round the core shank of the iron core with two end portions thereof respectively extended through the arched notches into the wire-mounting grooves, two flat electrodes respectively attached to the wire-mounting grooves and respectively connected with the end portions of the winding, and a magnetic coating surrounding the winding. The iron core has full round fillets in corner areas thereof for the passing of the two opposite end portions of the winding.

Abstract: A substrate is provided having an oxide layer, a first nitride-silicon, a STI, and a second nitride-silicon. A pattern poly-silicon layer on the second nitride-silicon layer is etched to form a deep trench opening. Etching the pattern poly-silicon layer also deepens the deep trench opening. Then, a conductive layer is filled in the deep trench opening.

Abstract: An electric apparatus with ESD protection effect is provided. The electric apparatus comprises a high-side unit, a low-side unit, and a level shifter. The high-side unit comprises a first pad and a second pad. The low-side unit comprises a third pad and a fourth pad. The level shifter is connected between the first pad and the fourth pad. The level shifter comprises a first resistor, a clamp element, a second resistor, and an N-type transistor. The first resistor is connected between the first pad and a first node. The clamp element is connected between the first pad and a second node. The second resistor is connected between the first node and the second node. The N-type transistor has a source and a body connected to the fourth pad, a drain connected to the first node, and a gate connected to the low-side unit.

Abstract: A touch sensing apparatus includes a plurality of pins, a logic control module, and at least one amplifier module. The logic control module generates a plurality of control signals having different control timings, wherein the control signals include an amplifying control signal and a compensating control signal. Each amplifying module includes an amplifying unit and an automatic compensating unit. The amplifying unit includes a positive input end and a negative input end, wherein the amplifying unit determines, according to the amplifying control signal, a difference between a first sensing voltage and a second sensing voltage respectively received by the positive input end and the negative input end and amplifies the difference to output an analog data. The automatic compensating unit records, according to the compensating control signal, a digital compensation value corresponding to one of the pins and outputs the digital compensation value according to the compensating control signal.

Abstract: A touch sensing apparatus includes a logic control module and at least one input control module. The logic control module generates a plurality of control signals having different control timings, wherein the control signals include an input control signal. The input control module is coupled with the logic control module, wherein each input control module includes a positive input switch and a negative input switch. The input control module controls, according to the input control signal, the positive input switch and the negative input switch to be deactivated or activated to control an input mode of a first sensing voltage and a second sensing voltage, which are analog data respectively sensed through a first sensing line and a second sensing line of a conductive thin film sensor, wherein the first sensing line and the second sensing line are sensing lines of adjacent channels.

Abstract: The present invention provides a touch sensing apparatus including a plurality of pins, a logic control module, and at least one driving/sensing control module. The logic control module generates a plurality of control signals having different control timings. Each driving/sensing control module is coupled with the logic control module and the pins, wherein the driving/sensing control module receives a first control signal of the control signals from the logic control module and controls the pins to execute a plurality of pin functions according to a first control timing of the first control signal, so that the pins simultaneously sense a plurality of analog data from a conductive thin film sensor.

Abstract: A touch sensing apparatus includes a logic control module, a plurality of storage capacitors, at least one decoding control module, and at least one differential amplifier. The logic control module generates a plurality of control signals having different control timings, wherein the control signals comprise a decoding control signal. The decoding control module is coupled with the logic control module and the storage capacitors and decodes according to a decoding control timing of a decoding control signal and outputs a first sensing voltage and a second sensing voltage of the storage capacitors. The differential amplifier is coupled with the decoding control module and calculates a voltage variance between the first sensing voltage and the second sensing voltage to output an amplified analog data.

Abstract: A touch sensing apparatus is disclosed. The touch sensing apparatus includes a logic control module, at least one storage control module, and at least one decoding control module. The logic control module is used to generate a plurality of control signals having different control timings. The plurality of control signals includes a storage control signal and a decoding control signal. Each storage control module includes a plurality of storage capacitors, and respectively stores each of sensed voltages in different storage capacitors at different times according to a storage control timing of the storage control signal. The sensed voltages are analog data sensed from scan lines of an ITO sensor. The decoding control module is used to decode the sensed voltages stored in the storage capacitors according to a decoding control timing of the decoding control signal to output the decoded analog data.

Abstract: A touch sensing apparatus is disclosed. The touch sensing apparatus includes a logic control module, at least one storage control module, and at least one decoding control module. The logic control module is used to generate a plurality of control signals having different control timings. The plurality of control signals includes a storage control signal and a decoding control signal. Each storage control module includes a plurality of storage capacitors, and respectively stores each of sensed voltages in different storage capacitors at different times according to a storage control timing of the storage control signal. The sensed voltages are analog data sensed from scan lines of an ITO sensor. The decoding control module performs analog adding process to the sensed voltages stored in the storage capacitors according to a decoding control timing of the decoding control signal to output decoded analog data with high signal-to-noise ratio (SNR).

Abstract: A vertical light emitting diode (VLED) die includes a p-type confinement layer, an active layer on the p-type confinement layer configured to emit light, and an n-type confinement structure having at least one etch stop layer configured to protect the active layer. A method for fabricating a vertical light emitting diode (VLED) die includes the steps of: providing a carrier substrate; forming an n-type confinement structure on the carrier substrate having at least one etch stop layer; forming an active layer on the n-type confinement structure; forming a p-type confinement layer on the active layer; and removing the carrier substrate.

Abstract: Dual operation centrifugal fan apparatus and methods of operating same that may be used, for example, to cool the internal heat-generating components of an information handling system or other device. The dual operation centrifugal fan apparatus may be implemented in one embodiment as a self-cleaning blower apparatus that is operated in a first normal cooling direction to dissipate heat from internal components of an information handling system, and operated in second cleaning direction to reverse airflow and expel accumulated dust from the interior of the information handling system.

Abstract: A disk drive includes a chassis having a spindle motor for rotating a disk and a read/write head for reading or writing data on the disk, a slide block disposed at one side of the chassis and slidable reciprocally along an entrance-and-exit route defined by the disk, and a support member mounted on the slide member so as to be movable together therewith. The support member supports the disk from below during inserting the disk into the disk drive.

Abstract: A voltage multiplying circuit comprising: a first capacitor, comprising a first terminal and a second terminal, wherein the first terminal of the first capacitor is selectively coupled to a first voltage or a second voltage, and the second terminal is selectively coupled to the first voltage or a fourth voltage; a second capacitor, comprising a first terminal and a second terminal, wherein the first terminal of the second capacitor is selectively coupled to the second voltage or the fourth voltage, and the second terminal of the second capacitor is selectively coupled to a third voltage or the fourth voltage; and a third capacitor, comprising a first terminal and a second terminal, wherein the first terminal of the third capacitor is selectively coupled to the second voltage or the fourth voltage, and the second terminal of the third capacitor is selectively coupled to a third voltage or the fourth voltage.