Patents by Inventor Kuo Chan

Kuo Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240084455
    Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 14, 2024
    Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Publication number: 20240079268
    Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip structure. The method may be performed by forming a plurality of interconnect layers within a first interconnect structure disposed over an upper surface of a first semiconductor substrate. An edge trimming process is performed to remove parts of the first interconnect structure and the first semiconductor substrate along a perimeter of the first semiconductor substrate. The edge trimming process results in the first semiconductor substrate having a recessed surface coupled to the upper surface by way of an interior sidewall disposed directly over the first semiconductor substrate. A dielectric capping structure is formed onto a sidewall of the first interconnect structure after performing the edge trimming process.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventors: Chih-Hui Huang, Cheng-Hsien Chou, Cheng-Yuan Tsai, Kuo-Ming Wu, Sheng-Chan Li
  • Patent number: 11916146
    Abstract: A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen
  • Patent number: 11907632
    Abstract: A system includes one or more data processors and a non-transitory computer-readable storage medium containing instructions which, when executed on the one or more data processors, cause the one or more data processors to perform operations. The operations include receiving a design schematic, extracting keywords from the design schematic, and sorting the design schematic by the extracted keywords. The operations further include extracting a part number of a component from the sorted design schematic, comparing the component associated with the part number with a reference component associated with the part number, and displaying a result of the comparison indicating whether the component and the reference component match.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: February 20, 2024
    Assignee: QUANTA COMPUTER INC.
    Inventors: Kuo-Chan Hsu, Yun-Teng Shih, Shou-Fu Li
  • Publication number: 20240017337
    Abstract: A hacksaw frame includes a beam, a front handle, a rear handle, and a blade. The beam includes a front rectilinear section, a rear rectilinear section, and an intermediate rectilinear section raised from the front and rear rectilinear sections so that there is a distance between a lower edge of the intermediate rectilinear section and a base line of the beam that passes through lower edges of the front and rear rectilinear sections. The front handle is connected to the front rectilinear section of the beam. The rear handle is connected to the rear rectilinear section of the beam. The blade includes a front section connected to the front handle and a rear section connected to the rear handle. The intermediate rectilinear section of the beam increases a distance between a lower edge of the beam and an upper edge of the blade.
    Type: Application
    Filed: July 15, 2022
    Publication date: January 18, 2024
    Inventor: KUO-CHAN HUANG
  • Publication number: 20230032507
    Abstract: A stationary device with an encrypted file access function and access method thereof are provided. The portable electronic device sends an access request of an electronic confidential file to the stationary device through a proximal connection. The stationary device sends an access request to the cloud server through a remote connection. Then the cloud server gives the corresponding access commands and verification commands to the portable electronic device and the stationary device. After the stationary device verifies that the access command matches the verification command through the proximal connection, the portable electronic device is allowed to access the electronic confidential file. The portable electronic device and the stationary device constantly check whether they are still within a certain distance, so as to restrict the user from accessing the electronic confidential file only in specific areas. Thus, the business secrets and national defense secrets are effectively protected.
    Type: Application
    Filed: February 11, 2022
    Publication date: February 2, 2023
    Inventors: Hou-Chun LEE, Ke-Wei WANG, Kuo-Chan HUANG
  • Publication number: 20230032524
    Abstract: A sharing device and a proximal access method thereof are provided. Via the first communication unit with a smaller effective communication range, the portable electronic device can obtain control of the sharing device at a closer location and obtain the connection information of the second communication unit. Later, through the second communication unit with a larger effective communication range, the portable electronic device can conveniently control the sharing device. In this way, it is possible to avoid mishandling other sharing devices in the same space when initially gaining control, and to allow users to extend the distance of use after gaining control, which has both access security and convenience.
    Type: Application
    Filed: February 11, 2022
    Publication date: February 2, 2023
    Inventors: Hou-Chun LEE, Ke-Wei WANG, Kuo-Chan HUANG
  • Publication number: 20230035974
    Abstract: A control system and a control method of sharing device with liftin function are provided. The portable electronic device sends a request to the cloud server. The cloud server matches the sharing device that meets the request to the portable electronic device so that the portable electronic device have a control right over the paired sharing device. Then the portable electronic device controls lifting or other functions of the sharing device within a specific time, so as to facilitate the management of multiple sharing devices in different places.
    Type: Application
    Filed: February 11, 2022
    Publication date: February 2, 2023
    Inventors: Hou-Chun LEE, Ke-Wei WANG, Kuo-Chan HUANG
  • Patent number: 11539286
    Abstract: A power supply circuit includes a power converter, an input voltage source, and a clamping circuit. The power converter has an input pin, an output pin, and an enable pin. The input voltage source is electrically connected to the input pin, and provides an input voltage to the input pin. The clamping circuit is electrically connected to the enable pin of the power converter. When the input voltage increases to at least a threshold input voltage, the clamping circuit is configured to activate the power converter to provide an output voltage at the output pin. When the input voltage decreases below the threshold input voltage, the clamping circuit is configured to deactivate the power converter and prevent the power converter from being re-activated within a predefined time period.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: December 27, 2022
    Assignee: QUANTA COMPUTER INC.
    Inventors: Kuo-Chan Hsu, Yun-Teng Shih, Shou-Fu Li
  • Patent number: 11532509
    Abstract: A method includes forming a gate electrode on a semiconductor region, recessing the gate electrode to generate a recess, performing a first deposition process to form a first metallic layer on the gate electrode and in the recess, wherein the first deposition process is performed using a first precursor, and performing a second deposition process to form a second metallic layer on the first metallic layer using a second precursor different from the first precursor. The first metallic layer and the second metallic layer comprise a same metal. The method further incudes forming a dielectric hard mask over the second metallic layer, and forming a gate contact plug penetrating through the dielectric hard mask. The gate contact plug contacts a top surface of the second metallic layer.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: December 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Pin-Hsuan Yeh, Wei-Chin Lee, Hsien-Ming Lee, Chien-Hao Chen, Chi On Chui
  • Publication number: 20220397282
    Abstract: A barbecue grill includes a barrel and a supporting unit. The barrel includes multiple panels and two lugs. The panels are pivotally connected to one another so that the barrel is switchable between an extended position and a collapsed position. The lugs are formed on one of the panels. The supporting unit includes a frame and multiple loops. The frame includes two lateral sections and two pivots. The lateral sections extend parallel to each other. The pivots extend from the lateral sections, respectively. The pivots are inserted in the lugs when the lateral sections are released. The pivots are disengaged from the lugs when the lateral sections are moved relative to each other. The loops are located on and connected to the lateral sections.
    Type: Application
    Filed: June 15, 2021
    Publication date: December 15, 2022
    Inventor: KUO-CHAN HUANG
  • Publication number: 20220395990
    Abstract: A box cutter includes a blade, a handle, a sheath and a restraining element. The handle includes a space for receiving a rear portion of the blade, a chamber in communication with the space, a rear slot in communication with the space, and a front slot in communication with the chamber. The sheath is movable in the chamber and covers a front portion of the blade. The restraining element is movable in the handle between a locking position and an unlocking position. In the locking position, the restraining element abuts against the sheath to prevent the sheath from retreating into the handle to keep on covering the front portion of the blade. In the unlocking position, the restraining element is moved from the sheath to allow the sheath to retreat into the handle to allow the front portion of the blade to extend from the sheath.
    Type: Application
    Filed: June 15, 2021
    Publication date: December 15, 2022
    Inventor: KUO-CHAN HUANG
  • Publication number: 20220367261
    Abstract: A method includes forming a gate electrode on a semiconductor region, recessing the gate electrode to generate a recess, performing a first deposition process to form a first metallic layer on the gate electrode and in the recess, wherein the first deposition process is performed using a first precursor, and performing a second deposition process to form a second metallic layer on the first metallic layer using a second precursor different from the first precursor. The first metallic layer and the second metallic layer comprise a same metal. The method further incudes forming a dielectric hard mask over the second metallic layer, and forming a gate contact plug penetrating through the dielectric hard mask. The gate contact plug contacts a top surface of the second metallic layer.
    Type: Application
    Filed: July 20, 2022
    Publication date: November 17, 2022
    Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Pin-Hsuan Yeh, Wei-Chin Lee, Hsien-Ming Lee, Chien-Hao Chen, Chi On Chui
  • Publication number: 20220345028
    Abstract: A power supply circuit includes a power converter, an input voltage source, and a clamping circuit. The power converter has an input pin, an output pin, and an enable pin. The input voltage source is electrically connected to the input pin, and provides an input voltage to the input pin. The clamping circuit is electrically connected to the enable pin of the power converter. When the input voltage increases to at least a threshold input voltage, the clamping circuit is configured to activate the power converter to provide an output voltage at the output pin. When the input voltage decreases below the threshold input voltage, the clamping circuit is configured to deactivate the power converter and prevent the power converter from being re-activated within a predefined time period.
    Type: Application
    Filed: April 21, 2021
    Publication date: October 27, 2022
    Inventors: Kuo-Chan HSU, Yun-Teng SHIH, Shou-Fu LI
  • Publication number: 20220335188
    Abstract: A system includes one or more data processors and a non-transitory computer-readable storage medium containing instructions which, when executed on the one or more data processors, cause the one or more data processors to perform operations. The operations include receiving a design schematic, extracting keywords from the design schematic, and sorting the design schematic by the extracted keywords. The operations further include extracting a part number of a component from the sorted design schematic, comparing the component associated with the part number with a reference component associated with the part number, and displaying a result of the comparison indicating whether the component and the reference component match.
    Type: Application
    Filed: April 16, 2021
    Publication date: October 20, 2022
    Inventors: Kuo-Chan HSU, Yun-Teng SHIH, Shou-Fu LI
  • Publication number: 20220275352
    Abstract: A bacteriophage RNA polymerase variant is provided. In some embodiments, the variant may have increased thermostability relative to the corresponding wild type bacteriophage RNA polymerase and/or wild type T7 RNA polymerase. Compositions, kits and methods that employ the variant are also provided.
    Type: Application
    Filed: May 11, 2022
    Publication date: September 1, 2022
    Applicant: New England Biolabs, Inc.
    Inventors: Jennifer Ong, Vladimir Potapov, Kuo-Chan Hung, Haruichi Asahara, Shaorong Chong, George Tzertzinis
  • Publication number: 20220238715
    Abstract: A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen
  • Patent number: 11381971
    Abstract: A method of authorizing an access point includes receiving a first transmission signal from a first access point. The first transmission signal comprises identifying information of the first access point that includes a first token. The method includes receiving a second transmission signal from a client device. The second transmission signal includes a second token that is received by the client device from an un-provisioned access point. When a match is determined between the first token and the second token, the first access point is identified as the un-provisioned access point. The method includes transmitting the identifying information of the first access point and a request to the client device to authorize the un-provisioned access point. The method includes receiving a third transmission signal from the client device that includes an authorization verification of the un-provisioned access point that authorities the un-provisioned access point to connect to a cloud-managed network.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: July 5, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Mathieu Mercier, Robert Gagnon, Guy Letourneau, Stephane Laroche, Ho-Kuo Chan
  • Patent number: 11359184
    Abstract: A bacteriophage RNA polymerase variant is provided. In some embodiments, the variant may have increased thermostability relative to the corresponding wild type bacteriophage RNA polymerase and/or wild type T7 RNA polymerase. Compositions, kits and methods that employ the variant are also provided.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: June 14, 2022
    Assignee: New England Biolabs, Inc.
    Inventors: Jennifer Ong, Vladimir Potapov, Kuo-Chan Hung, Haruichi Asahara, Shaorong Chong, George Tzertzinis
  • Patent number: 11302818
    Abstract: A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: April 12, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen