Patents by Inventor Kuo-Chang Wu

Kuo-Chang Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240097520
    Abstract: An axial flux motor includes a rotor assembly and a stator assembly. The rotor assembly has magnets. The stator assembly has a circuit substrate, segmented iron cores, and a coil. The circuit substrate extends radially. The segmented iron cores are supported on the circuit substrate to be opposite to the magnet in the axial direction. Segmented iron cores arranged in the circumferential direction. A coil is sleeved on a segmented iron core. Holding seats of an insulating material correspond respectively to the segmented iron cores. A holding seat abuts with and covers a segmented iron core from both axial sides and the circumferential direction, and is used for winding the coil. The circuit substrate has slot holes. A slot hole is used for embedding and positioning a portion of a holding seat that protrudes more towards one axial side than the coil.
    Type: Application
    Filed: August 28, 2023
    Publication date: March 21, 2024
    Inventors: Keng-Chang WU, Guo-Jhih YAN, Hsiu-Ying LIN, Kuo-Min WANG
  • Publication number: 20240088145
    Abstract: Examples of an integrated circuit with gate cut features and a method for forming the integrated circuit are provided herein. In some examples, a workpiece is received that includes a substrate and a plurality of fins extending from the substrate. A first layer is formed on a side surface of each of the plurality of fins such that a trench bounded by the first layer extends between the plurality of fins. A cut feature is formed in the trench. A first gate structure is formed on a first fin of the plurality of fins, and a second gate structure is formed on a second fin of the plurality of fins such that the cut feature is disposed between the first gate structure and the second gate structure.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 14, 2024
    Inventors: Zhi-Chang Lin, Wei-Hao Wu, Jia-Ni Yu, Chih-Hao Wang, Kuo-Cheng Ching
  • Publication number: 20220192393
    Abstract: The present invention provides a crib rail structure that includes: at least one hollow horizontal tube member, a side portion of which is provided with a plurality of interspaced openings; and a plurality of hollow beam tube members, which are respectively inserted into the interspaced openings of the hollow horizontal tube members for assembly use. The sides of each of the hollow beam tube members are provided with a through opening, which are located in the tail end of the hollow beam tube member. Moreover, the positions of the through openings are adjacent to the sides of each of the interspaced openings of the hollow horizontal tube member. The crib rail structure further comprises the at least one fixing member, which passes through the plurality of hollow beam tube members and presses against the tube inner wall of the hollow horizontal tube member for fixing thereof.
    Type: Application
    Filed: August 18, 2021
    Publication date: June 23, 2022
    Inventor: Kuo-Chang WU
  • Patent number: 9894779
    Abstract: An embedded component substrate and methods for fabricating the same are provided. The embedded component substrate includes a substrate having at least one cavity, a first surface, and a second surface. The embedded component substrate also includes at least one electronic component formed in the at least one cavity. The embedded component substrate also includes a first wiring layer formed in the space between a sidewall of the at least one electronic component and a sidewall of the at least one cavity. The first wiring layer extends from the first surface of the substrate to the sidewall of the at least one cavity, and directly contacts the at least one electronic component.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: February 13, 2018
    Assignee: Nan Ya PCB Corp.
    Inventors: Wei-Ta Fu, Kuo-Chang Wu, Yu-Chih Lin
  • Patent number: 9289075
    Abstract: A metal crib bedstead includes a pair of symmetrical widthwise frames, a pair of symmetrical longitudinal frames, a mattress support frame and four elongated anchor planks. The widthwise frames and the longitudinal frames are made of metal and coupled together by wedging and welding. The mattress support frame includes an outer frame, a mesh frame and a plurality of springs connecting the mesh frame to the outer frame to evenly hold a mattress on the mattress support frame. The elongated anchor planks connect to the widthwise frame and the mattress support frame, and four anchor struts are fastened on the outer frame respectively near the lower ends of the elongated anchor planks for the anchor planks to rest without swaying. Hence the mattress support frame with different sizes can be coupled with the widthwise frames and the longitudinal frames. Assembly can be done quickly with enhanced strength.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: March 22, 2016
    Inventor: Kuo-Chang Wu
  • Publication number: 20160007469
    Abstract: An embedded component substrate and methods for fabricating the same are provided. The embedded component substrate includes a substrate having at least one cavity, a first surface, and a second surface. The embedded component substrate also includes at least one electronic component formed in the at least one cavity. The embedded component substrate also includes a first wiring layer formed in the space between the at least one electronic component and the at least one cavity. The first wiring layer extends from the first surface of the substrate to a sidewall of the at least one cavity, and directly contacts the at least one electronic component.
    Type: Application
    Filed: July 2, 2015
    Publication date: January 7, 2016
    Inventors: Wei-Ta FU, Kuo-Chang WU, Yu-Chih LIN
  • Publication number: 20150110479
    Abstract: A heating device of an instant hot water dispenser is provided with an inlet, an outlet, a PCB, a solenoid valve, a flow meter, a first heating unit, and a second heating unit. The PCB includes a first transformer for supplying DC to the first heating unit, a second transformer for supplying DC to the second heating unit, a receiver for receiving pulses of IR light from a remote control, and a microcontroller electrically connected to the PCB for controlling the solenoid valve, sensing a flow rate measured by the flow meter, and communicating with the receiver so that an operation of the remote control wirelessly commands the microcontroller to control electric current to the first and second heating units.
    Type: Application
    Filed: October 21, 2013
    Publication date: April 23, 2015
    Inventor: Kuo Chang Wu
  • Publication number: 20150033473
    Abstract: A metal crib bedstead includes a pair of symmetrical widthwise frames, a pair of symmetrical longitudinal frames, a mattress support frame and four elongated anchor planks. The widthwise frames and the longitudinal frames are made of metal and coupled together by wedging and welding. The mattress support frame includes an outer frame, a mesh frame and a plurality of springs connecting the mesh frame to the outer frame to evenly hold a mattress on the mattress support frame. The elongated anchor planks connect to the widthwise frame and the mattress support frame, and four anchor struts are fastened on the outer frame respectively near the lower ends of the elongated anchor planks for the anchor planks to rest without swaying. Hence the mattress support frame with different sizes can be coupled with the widthwise frames and the longitudinal frames. Assembly can be done quickly with enhanced strength.
    Type: Application
    Filed: June 12, 2014
    Publication date: February 5, 2015
    Inventor: KUO-CHANG WU
  • Patent number: 8773643
    Abstract: The apparatus for sensing a distance from an object includes an emitter, a first receiver, and a second receiver. The emitter emits a light along an emitting direction toward the object. The first receiver is disposed on a side of the emitter and has a first light incident surface, wherein the first receiver receives the light reflected from the object to generate a first signal. The second receiver is disposed between the emitter and the first receiver and has a second light incident surface, wherein the second receiver receives the light reflected from the object to generate a second signal. The first receiver has a first signal-to-distance curve with a first peak, the second receiver has a second signal-to-distance curve with a second peak, and a distance corresponding to the first peak is larger than a distance corresponding to the second peak.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: July 8, 2014
    Assignee: Pegatron Corporation
    Inventor: Kuo-Chang Wu
  • Publication number: 20120206709
    Abstract: The apparatus for sensing a distance from an object includes an emitter, a first receiver, and a second receiver. The emitter emits a light along an emitting direction toward the object. The first receiver is disposed on a side of the emitter and has a first light incident surface, wherein the first receiver receives the light reflected from the object to generate a first signal. The second receiver is disposed between the emitter and the first receiver and has a second light incident surface, wherein the second receiver receives the light reflected from the object to generate a second signal. The first receiver has a first signal-to-distance curve with a first peak, the second receiver has a second signal-to-distance curve with a second peak, and a distance corresponding to the first peak is larger than a distance corresponding to the second peak.
    Type: Application
    Filed: February 15, 2012
    Publication date: August 16, 2012
    Applicant: PEGATRON CORPORATION
    Inventor: Kuo-Chang Wu
  • Publication number: 20100261592
    Abstract: A tube plug is used for a tube wrapped with rollable materials and comprises a support plate, a column, and a positioning part. The column and the positioning part are provided on the same surface of the support plate. Thereby, the length of the wrapped rollable materials can be prevented from increasing when the two openings of the tube are inserted with the tube plug respectively.
    Type: Application
    Filed: July 24, 2008
    Publication date: October 14, 2010
    Inventor: Kuo-Chang WU
  • Patent number: 7009847
    Abstract: A connector concealment mechanism for computer peripheral device is proposed, which is designed for use in conjunction with a computer peripheral device equipped with an external connector for the connector to be concealable into the casing of the computer peripheral device when not in use, and be easily ejected out of the computer casing for use to connect the computer peripheral device to a computer unit. This feature allows the computer peripheral device to be more advantageous to use than the prior art due to the fact that it allows the user to conceal the connector into the casing of the computer peripheral device when not in use, without having using a separable cap which would easily get lost as in the case of the prior art, thus making the use of the computer peripheral device more convenient and trouble-free than prior art.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: March 7, 2006
    Assignee: Inventec Multimedia & Telecom Corporation
    Inventors: Kuo-Chang Wu, Yi-Min Tseng, Hsin-Chiang Ho, Ya-Chyi Chou, Kao-Yu Hsu
  • Patent number: 6307273
    Abstract: An improved alignment mark used by a laser trimming tool to locate fuses in an underlying integrated circuit is formed using conventional processing sequences. The design features high resolution and improved low noise characteristics. The alignment mark is etched in a shallow layer over a metal layer rather than in the metal itself. The edges which are sensed by the scanning alignment laser of the trimming tool have their elevated portions external to the alignment mark. The improved design replaces a prior art design in which the metal mark protruded from a deep area in the site region. Debris in deep areas adjacent to alignment marks etched in metal, is avoided by the improved design. The absence of this debris virtually eliminates noise in the alignment scan thereby greatly reducing alignment errors.
    Type: Grant
    Filed: June 7, 1996
    Date of Patent: October 23, 2001
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Rong-Wu Chien, Kuo-Chang Wu
  • Patent number: 6218289
    Abstract: A method for annealing a contact in a doped dielectric layer without the occurrence of dopant diffusion problem by depositing a sacrificial barrier layer of oxide material in the contact opening which is capable of preventing diffusion of dopant ions into the contact opening during a high temperature reflow process for the doped dielectric layer and followed by a deposition of an electrically conductive metal into the contact opening.
    Type: Grant
    Filed: February 2, 1999
    Date of Patent: April 17, 2001
    Assignee: Vanguard International Semiconductor Corporation
    Inventor: Kuo-Chang Wu
  • Patent number: 6008137
    Abstract: A plasma etch method for forming a patterned silicon nitride layer within an integrated circuit. There is first provided a substrate having formed thereover a blanket silicon nitride layer. There is then formed upon the blanket silicon nitride layer a patterned photoresist layer. Finally, there is etched through a plasma etch method while employing the patterned photoresist layer as an etch mask layer the blanket silicon nitride layer to form a patterned silicon nitride layer. The plasma etch method employs an etchant gas composition comprising a perfluorocarbon etchant gas, a hydrofluorocarbon etchant gas and an oxygen etchant gas at a perfluorocarbon etchant gas flow rate, a hydrofluorocarbon etchant gas flow rate and an oxygen etchant gas flow rate which yields substantially no plasma etch bias of the patterned silicon nitride layer with respect to the patterned photoresist layer.
    Type: Grant
    Filed: March 12, 1999
    Date of Patent: December 28, 1999
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Ching-Ying Lee, Kuo-Chang Wu
  • Patent number: 5940731
    Abstract: The present invention provides a method of forming a tapered polysilicon contact plug having reduced dimensions beyond the normal resolution limit of a photolithographic method by utilizing at least one polysilicon sidewall spacer as a mask in an anisotropic etching process of an oxide layer such that a contact window of reduced dimensions can be formed for the subsequent deposition of a heavily-doped polysilicon for forming the contact plug.
    Type: Grant
    Filed: October 16, 1996
    Date of Patent: August 17, 1999
    Assignee: Vanguard International Semiconductor Corp.
    Inventor: Kuo-Chang Wu
  • Patent number: 5922622
    Abstract: A plasma etch method for forming a patterned silicon nitride layer within an integrated circuit. There is first provided a substrate having formed thereover a blanket silicon nitride layer. There is then formed upon the blanket silicon nitride layer a patterned photoresist layer. Finally, there is etched through a plasma etch method while employing the patterned photoresist layer as an etch mask layer the blanket silicon nitride layer to form a patterned silicon nitride layer. The plasma etch method employs an etchant gas composition comprising a perfluorocarbon etchant gas, a hydrofluorocarbon etchant gas and an oxygen etchant gas at a perfluorocarbon etchant gas flow rate, a hydrofluorocarbon etchant gas flow rate and an oxygen etchant gas flow rate which yields substantially no plasma etch bias of the patterned silicon nitride layer with respect to the patterned photoresist layer.
    Type: Grant
    Filed: September 3, 1996
    Date of Patent: July 13, 1999
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Ching-Ying Lee, Kuo-Chang Wu
  • Patent number: 5899747
    Abstract: A method for forming a gate with a tapered spacer is disclosed. The method includes forming a polysilicon layer on a substrate, and then forming a first oxide layer on the polysilicon layer. A photoresist layer is formed on the first oxide layer, where the photoresist layer defines a gate region, and then portions of the oxide layer and the polysilicon layer are removed using the photoresist layer as a mask, thereby forming a gate. A second oxide layer is formed on the substrate and the first oxide layer. Afterwards, the second oxide layer is isotropically etched so that the slope of the second oxide layer near the upper corners of the gate is reduced. Finally, the second oxide layer is anisotropically etched back to form spacers on the sidewalls of the gate.
    Type: Grant
    Filed: January 27, 1997
    Date of Patent: May 4, 1999
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Kuo-Chang Wu, Tzu-Shih Yen
  • Patent number: 5869383
    Abstract: An improved alignment mark used by a laser trimming tool to locate fuses in an underlying integrated circuit is formed using conventional processing sequences. The design features high resolution and improved low noise characteristics. The alignment mark is etched in a shallow layer over a metal layer rather than in the metal itself. The edges which are sensed by the scanning alignment laser of the trimming tool have their elevated portions external to the alignment mark. The improved design replaces a prior art design in which the metal mark protruded from a deep area in the site region. Debris in deep areas adjacent to alignment marks etched in metal, is avoided by the improved design. The absence of this debris virtually eliminates noise in the alignment scan thereby greatly reducing alignment errors.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: February 9, 1999
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Rong-Wu Chien, Kuo-Chang Wu
  • Patent number: 5286677
    Abstract: A method is described for etching contact openings through first and second interlevel dielectric layers covering the peripheral circuits of a DRAM integrated circuit to be electrically contacted in a semiconductor wafer is described. There is provided within and over the semiconductor wafer DRAM integrated circuit including peripheral circuits to be electrically contacted. A first conductive layer is formed over the DRAM integrated circuit and the layer is patterned. A first interlevel dielectric layer is formed over the first conductive layer which has been patterned. The first interlevel layer is composed of in the order from the first conductive layer of a silicon oxide layer and a borophosphosilicate layer. A second conductive layer is formed over the first interlevel dielectric layer and the second conductive layer is patterning said second conductive layer. A second interlevel dielectric layer is formed over the exposed second conductive layer and first interlevel dielectric.
    Type: Grant
    Filed: May 7, 1993
    Date of Patent: February 15, 1994
    Assignee: Industrial Technology Research Institute
    Inventor: Kuo-Chang Wu