Abstract: A chip includes an instruction storage unit, a processor core, an input circuit, a neural network circuit, power-consuming circuits, and a switch circuit. When the chip runs, the processor core performs a processing operation according to the instructions under being supplied with a current. At the same time, the neural network circuit predicts an upcoming change of the current according to data stream, representing the time-varying current, from the input circuit, and outputs a corresponding control signal. The switch circuit selectively provides a clock to one or more power-consuming circuits under the control of the control signal, so that each power-consuming circuit receiving the clock operates under being supplied with the current. Therefore, the chip can predict upcoming requirement of high electricity consumption, and duly start up a current wasting mechanism in advance, to avoid an excessive voltage drop without affecting operation efficiency of the processor core.

Abstract: A serial data processing device includes an offset detector circuit and an offset calibration circuit. The offset detector circuit is configured to store a plurality of tokens, and to receive a first data signal from a host device, and to detect an offset in the received first data signal according to the plurality of tokens, in order to generate a calibration signal, in which each of the tokens includes at least one predetermined logic value, and numbers of the at least one predetermined logic value in each of the plurality of tokens are different. The offset calibration circuit is configured to calibrate the received first data signal according to the calibration signal, in order to generate a second data signal.

Abstract: A serial data processing device includes an offset detector circuit and an offset calibration circuit. The offset detector circuit is configured to store a plurality of tokens, and to receive a first data signal from a host device, and to detect an offset in the received first data signal according to the plurality of tokens, in order to generate a calibration signal, in which each of the tokens includes at least one predetermined logic value, and numbers of the at least one predetermined logic value in each of the plurality of tokens are different. The offset calibration circuit is configured to calibrate the received first data signal according to the calibration signal, in order to generate a second data signal.

Abstract: A chip includes an instruction storage unit, a processor core, an input circuit, a neural network circuit, power-consuming circuits, and a switch circuit. When the chip runs, the processor core performs a processing operation according to the instructions under being supplied with a current. At the same time, the neural network circuit predicts an upcoming change of the current according to data stream, representing the time-varying current, from the input circuit, and outputs a corresponding control signal. The switch circuit selectively provides a clock to one or more power-consuming circuits under the control of the control signal, so that each power-consuming circuit receiving the clock operates under being supplied with the current. Therefore, the chip can predict upcoming requirement of high electricity consumption, and duly start up a current wasting mechanism in advance, to avoid an excessive voltage drop without affecting operation efficiency of the processor core.

Abstract: A voltage regulation circuit for LED tube coupled to an energy input terminal being an AC source, a CCG or a ECG, comprising: a controlling part, including: a first impedance unit coupled to the energy input terminal; a second impedance unit coupled to the first impedance unit; and a third impedance unit coupled to the second impedance unit; and a controlled part including at least an LED unit and coupled to the controlling part; wherein a first terminal of the first impedance unit is coupled to a first terminal of the second impedance unit, a second terminal of the second impedance unit is coupled to a first terminal of the third impedance unit through a node, and the node is coupled to the controlled part.

Abstract: A high-safety LED tube, comprising: a first side having a first electrode and a second electrode; a second side having a third electrode and a fourth electrode; a first impedance module coupled to the first side; a second impedance module coupled to the second side; a first energy sensor having a first terminal coupled to the first impedance module; a second energy sensor having a first terminal coupled to the second impedance module; an LED unit coupled to the first impedance module and the second impedance module; a switch coupled to the LED unit; and a state control module coupled to the switch; wherein, when the first energy sensor or the second energy sensor detects an energy flowing between the first electrode and the second electrode or between the third electrode and the fourth electrode, the state control module turns on the switch.

Abstract: A direct memory access method for A card reader and a method for programming A controller of the card reader are provided. This method actively sets the DMAC and uses the table established by the block status recording area of the memory card to set the DMAC parameter set. The DMAC parameter set is moved to the memory block allocated by the system. Each parameter set includes the initial address for the next parameter set. Hence, by giving the initial address of the DMAC parameter set, can read the DMAC parameters and move the data based on the DMAC parameters. After moving one block, the DMAC will automatically read the next DMAC parameter set. Hence, the reading speed can be enhanced.

Abstract: A method and an apparatus for directly copying data between multiple memory cards. In the invention data is transferred between various memory cards of different format without occupying memory or a system bus by means of the internal direct memory access (DMA) controller in cooperation with software drivers.