Patents by Inventor Kuo-Cheng Huang

Kuo-Cheng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210104441
    Abstract: Provided are FinFET devices and methods of forming the same. A FinFET device includes a substrate, a first gate strip and a second gate strip. The substrate has at least one first fin in a first region, at least one second fin in a second region and an isolation layer covering lower portions of the first and second fins. The first fin includes a first material layer and a second material layer over the first material layer, and the interface between the first material layer and the second material layer is uneven. The first gate strip is disposed across the first fin. The second gate strip is disposed across the second fin.
    Type: Application
    Filed: November 23, 2020
    Publication date: April 8, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Wang, Jui-Chien Huang, Kuo-Cheng Ching, Chun-Hsiung Lin, Pei-Hsun Wang
  • Publication number: 20210104735
    Abstract: An anode active material of a lithium ion battery includes primary particles. The primary particles include Si, Sn and Sb. The primary particles have peaks at X-ray diffraction 2? position of 29.1±1°, 41.6±1°, 51.6±1°, 60.4±1°, 68.5±1°, and 76.1±1°.
    Type: Application
    Filed: March 6, 2020
    Publication date: April 8, 2021
    Inventors: Jui-Shen Chang, Yun-Shan Lo, Kuo-Cheng Huang
  • Patent number: 10969561
    Abstract: A driving mechanism for moving an optical element is provided, including a housing, a frame, a holder, and a driving assembly. The frame is fixed to the housing and forms a depressed surface adjacent to the housing. Specifically, the depressed surface faces the housing and is not in contact with the housing. The holder is movably disposed in the housing for holding the optical element. The drive assembly is disposed in the housing to drive the holder and the optical element to move relative to the frame.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: April 6, 2021
    Assignee: TDK Taiwan Corp.
    Inventors: Chao-Chang Hu, Bing-Ru Song, Yi-Ho Chen, Chia-Pin Hsu, Chih-Wei Weng, Shin-Hua Chen, Chien-Lun Huang, Chao-Chun Chang, Shou-Jen Liu, Kun-Shih Lin, Nai-Wen Hsu, Yu-Cheng Lin, Shang-Yu Hsu, Yu-Huai Liao, Yi-Hsin Nieh, Shih-Ting Huang, Kuo-Chun Kao, Fu-Yuan Wu
  • Publication number: 20210098573
    Abstract: The present disclosure provides a semiconductor structure, including a substrate having a front surface, a fin protruding from the front surface, the fin including: a first semiconductor layer in proximal to the front surface, a second semiconductor layer stacked over the first semiconductor layer, a gate between the first semiconductor layer and the second semiconductor layer, and a spacer between the first semiconductor layer and the second semiconductor layer, contacting the gate, and a source/drain (S/D) region laterally surrounding the fin, wherein the spacer has an upper surface interfacing with the second semiconductor layer, the upper surface including: a first section proximal to the S/D region, a second section proximal to the gate, and a third section between the first section and the second section, wherein an absolute value of a derivative at the third section is greater than an absolute value of a derivative at the second section.
    Type: Application
    Filed: February 7, 2020
    Publication date: April 1, 2021
    Inventors: GUAN-LIN CHEN, KUO-CHENG CHIANG, CHIH-HAO WANG, SHI NING JU, JUI-CHIEN HUANG
  • Publication number: 20210098456
    Abstract: A semiconductor device according to an embodiment includes a first gate-all-around (GAA) transistor and a second GAA transistor. The first GAA transistor includes a first plurality of channel members, a first interfacial layer over the first plurality of channel members, a first hafnium-containing dielectric layer over the first interfacial layer, and a metal gate electrode layer over the first hafnium-containing dielectric layer. The second GAA transistor includes a second plurality of channel members, a second interfacial layer over the second plurality of channel members, a second hafnium-containing dielectric layer over the second interfacial layer, and the metal gate electrode layer over the second hafnium-containing dielectric layer. A first thickness of the first interfacial layer is greater than a second thickness of the second interfacial layer. A third thickness of the first hafnium-containing dielectric layer is smaller than a fourth thickness of the second hafnium-containing dielectric layer.
    Type: Application
    Filed: September 26, 2019
    Publication date: April 1, 2021
    Inventors: Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang
  • Publication number: 20210098455
    Abstract: A semiconductor structure includes a substrate including a first region and a second region, a first FET device disposed in the first region, and a second FET device disposed in the second region. The first FET device includes a fin structure, a first work function metal layer disposed over the fin structure, and a high-k gate dielectric layer between the first work function metal layer and the fin structure. The second FET device includes a plurality of nanosheets stacked over the substrate and separated from each other, a second work function metal layer surrounding each of the nanosheets, and the high-k gate dielectric layer between the second work function metal layer and each of the nanosheets. In some embodiments, the fin structure has a first width, each of the nanosheets has a second width, and the second width is greater than the first width.
    Type: Application
    Filed: February 5, 2020
    Publication date: April 1, 2021
    Inventors: JIA-NI YU, KUO-CHENG CHIANG, LUNG-KUN CHU, CHUNG-WEI HSU, CHIH-HAO WANG, MAO-LIN HUANG
  • Patent number: 10955641
    Abstract: A driving mechanism is provided, including a case, a holder and a driving module. The holder is disposed in the case for holding an optical member. The driving module is disposed in the case for driving the holder. The case is substantially quadrilateral and includes a first side and a second side. The driving module includes a first magnetic driving component winding on a periphery of the holder. The first magnetic driving component includes a first segment and a second segment that are respectively substantially parallel to the first side and the second side. The distance between the first segment and the first side is different from the distance between the second segment and the second side.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: March 23, 2021
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Bing-Ru Song, Yi-Ho Chen, Chia-Pin Hsu, Chih-Wei Weng, Shin-Hua Chen, Chien-Lun Huang, Chao-Chun Chang, Shou-Jen Liu, Kun-Shih Lin, Nai-Wen Hsu, Yu-Cheng Lin, Shang-Yu Hsu, Yu-Huai Liao, Yi-Hsin Nieh, Shih-Ting Huang, Kuo-Chun Kao, Fu-Yuan Wu
  • Publication number: 20210083118
    Abstract: A device includes a semiconductor fin, and a gate stack on sidewalls and a top surface of the semiconductor fin. The gate stack includes a high-k dielectric layer, a work-function layer overlapping a bottom portion of the high-k dielectric layer, and a blocking layer overlapping a second bottom portion of the work-function layer. A low-resistance metal layer overlaps and contacts the work-function layer and the blocking layer. The low-resistance metal layer has a resistivity value lower than second resistivity values of both of the work-function layer and the blocking layer. A gate spacer contacts a sidewall of the gate stack.
    Type: Application
    Filed: September 16, 2019
    Publication date: March 18, 2021
    Inventors: Chung-Chiang Wu, Po-Cheng Chen, Kuo-Chan Huang, Hung-Chin Chung, Hsien-Ming Lee, Chien-Hao Chen
  • Patent number: 10942456
    Abstract: An ultraviolet (UV) light source is provided. The device uses a high-uniformity diode array. A lens unit of collimated illumination lenses is used. A light source of UV light-emitting diode (UVLED) array is formed and passes through the lens unit to uniformly distribute the light source and obtain a collimated light. The present invention comprises a light source of UVLED array; a collimated illumination lens unit; and a substrate. The construction is simple. The present invention can be applied in the lithography of a semiconductor. The lithography forms contact lines of widths not greater than 3 microns (?m); soft-contact lines of widths of 3˜30 ?m; and short-spaced lines of widths of 30˜200 ?m. The present invention avoids the mask from contact wear-out for multiple uses, and further reduces the replacement rate.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: March 9, 2021
    Assignee: National Applied Research Laboratories
    Inventors: Jiun-Woei Huang, Min-Wei Hung, Kuo-Cheng Huang
  • Patent number: 10943942
    Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a device layer and a trench isolation. The semiconductor substrate has a front side surface and a back side surface opposite to the front side surface. The radiation sensing member is disposed in a photosensitive region of the semiconductor substrate and extends from the front side surface of the semiconductor substrate. The radiation sensing member includes a semiconductor material with an optical band gap energy smaller than 1.77 eV. The device layer is over the front side surface of the semiconductor substrate and the radiation sensing member. The trench isolation is disposed in an isolation region of the semiconductor substrate and extends from the back side surface of the semiconductor substrate.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: March 9, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Yu Wei, Yen-Liang Lin, Kuo-Cheng Lee, Hsun-Ying Huang, Hsin-Chi Chen
  • Publication number: 20210066473
    Abstract: A semiconductor device is provided. The semiconductor device includes a plurality of channel layers stacked over a semiconductor substrate and spaced apart from one another, a source/drain structure adjoining the plurality of channel layers, a gate structure wrapping around the plurality of channel layers, and a first inner spacer between the gate structure and the source/drain structure and between the plurality of channel layers. The first inner spacer is made of an oxide of a semiconductor material.
    Type: Application
    Filed: October 27, 2020
    Publication date: March 4, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsiung LIN, Pei-Hsun WANG, Chih-Hao WANG, Kuo-Cheng CHING, Jui-Chien HUANG
  • Publication number: 20210066136
    Abstract: A semiconductor device is provided. The semiconductor device includes a plurality of first semiconductor nanosheets spaced apart from each other and in a p-type device region, and a plurality of second semiconductor nanosheets spaced apart from each other and in an n-type device region. The semiconductor device includes an isolation structure formed at a boundary between the p-type and n-type device regions, and a first hard mask layer formed over the first semiconductor nanosheets. The semiconductor device also includes a second hard mask layer formed over the second semiconductor nanosheets, and a p-type work function layer surrounding each of the first semiconductor nanosheets and the first hard mask layer.
    Type: Application
    Filed: November 13, 2020
    Publication date: March 4, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Cheng CHIANG, Chung-Wei HSU, Lung-Kun CHU, Jia-Ni YU, Chih-Hao WANG, Mao-Lin HUANG
  • Publication number: 20210066137
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first stack structure and a second stack structure in a first area over a substrate, wherein each of the stack structures includes semiconductor layers separated and stacked up; depositing a first interfacial layer around each of the semiconductor layers of the stack structures; depositing a gate dielectric layer around the first interfacial layer; forming a dipole oxide layer around the gate dielectric layer; removing the dipole oxide layer around the gate dielectric layer of the second stack structure; performing an annealing process to form a dipole gate dielectric layer for the first stack structure and a non-dipole gate dielectric layer for the second stack structure; and depositing a first gate electrode around the dipole gate dielectric layer of the first stack structure and the non-dipole gate dielectric layer of the second stack structure.
    Type: Application
    Filed: July 10, 2020
    Publication date: March 4, 2021
    Inventors: Chung-Wei Hsu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Hou-Yu Chen, Ching-Wei Tsai, Chih-Hao Wang, Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu
  • Publication number: 20210066294
    Abstract: According to one example, a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.
    Type: Application
    Filed: July 17, 2020
    Publication date: March 4, 2021
    Inventors: Jui-Chien Huang, Shih-Cheng Chen, Chih-Hao Wang, Kuo-Cheng Chiang, Zhi-Chang Lin, Jung-Hung Chang, Lo-Heng Chang, Shi Ning Ju, Guan-Lin Chen
  • Patent number: 10937704
    Abstract: A method includes depositing a first conductive material on a first-type channel stack and a second-type channel stack, the first conductive material having a first workfunction, the first conductive material being formed between multiple layers of both the first-type channel stack and the second-type channel stack. The method further includes partially removing the first conductive material from the second-type channel stack such that the first conductive material remains between the multiple layers of both the first-type channel stack and the second-type channel stack and fully removing the first conductive material from the second-type channel stack.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: March 2, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-Cheng Chiang, Chung-Wei Hsu, Lung-Kun Chu, Jia-Ni Yu, Chih-Hao Wang, Mao-Lin Huang
  • Patent number: 10930818
    Abstract: A light emitting device includes: a plurality of light emitting stacked layers, including a first surface and a second surface, wherein the second surface is electrically opposite to the first surface; a mesa structure; and a current blocking (CB) layer disposed on the first surface; a transparent conductive layer disposed on or above the first surface; and a first pad electrode, disposed on the transparent conductive layer and on the first surface; wherein a sidewall of the CB layer comprises a first surface section and a second surface section having different slopes.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: February 23, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Chien Cheng Huang, Kuo-Wei Yen, Yu-Wei Kuo, Yao-Wei Yang, Pei-Hsiang Tseng
  • Patent number: 10928247
    Abstract: A system for detecting an illuminance of the present invention includes a light source, a light sensor, and a signal output module. The light source includes a first A light-emitting diode, the first A light-emitting diode having a first color light; and the light source emits a first ray of light. The light sensor has a sensing face; the light sensor includes a first B light-emitting diode disposed on the sensing face, the first B light-emitting diode having the first color light; and the light sensor receives at least a portion of the first ray of light and generates a first sensing voltage. The signal output module is coupled to the light sensor to receive the first sensing voltage and output a sensing result signal according to the first sensing voltage.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: February 23, 2021
    Assignee: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Fang-Ci Su, Hsin-Yi Tsai, Min-Wei Hung, Yi-Cheng Lin, Kuo-Cheng Huang, Hsin-Su Yu, Chiou-Lian Lai, Chung-Yao Hsu, Chao-Hung Cheng, Li-Wei Kuo
  • Publication number: 20210050427
    Abstract: A semiconductor device includes a source/drain feature disposed over a substrate. The source/drain feature includes a first nanowire, a second nanowire disposed over the first nanowire, a cladding layer disposed over the first nanowire and the second nanowire and a spacer layer extending from the first nanowire to the second nanowire. The device also includes a conductive feature disposed directly on the source/drain feature such that the conductive feature physically contacts the cladding layer and the spacer layer.
    Type: Application
    Filed: October 16, 2020
    Publication date: February 18, 2021
    Inventors: Kuo-Cheng Ching, Ching-Fang Huang, Wen-Hsing Hsieh, Ying-Keung Leung, Chih-Hao Wang, Carlos H. Diaz
  • Patent number: 10912499
    Abstract: The present invention provides a detecting apparatus based on image for detecting blood glucose concentration and method thereof. The detecting apparatus comprising a lighting device, an image capture device, a thermal imager and an operating device. The lighting device including a first wavelength of light source and a second wavelength of light source, configured to illuminate skin. The image capture device disposed above the lighting device, configured to capture a first image and a second image corresponding to the first wavelength of light source and the second wavelength of light source illuminated on the skin respectively. The thermal imager is configured to detect temperature of the skin. The operating device is connected to the lighting device, the image capture device and the thermal imager, configured to calculate blood glucose concentration according to the first image, the second image and the temperature.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: February 9, 2021
    Assignee: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Hsin-Yi Tsai, Kuo-Cheng Huang, Ching-Ching Yang, Tzu-Ting Wei
  • Patent number: 10912948
    Abstract: The present invention provides a composite intelligent biological phototherapy device including a base structure, a plurality of white light fluorescent tubes arranged side by side on the base structure, a plurality of LEDs disposed between the white light fluorescent tubes, a housing having an opening and configured to accommodate the base structure and the white light fluorescent tubes and the LEDs thereon, a light-transmittable plate disposed on the housing corresponding to the opening, and an control module configured to respectively control the white light fluorescent tubes and the LEDs. The base structure includes a plurality of sections, and each of the sections has a first surface facing the light-transmittable plate. The white light fluorescent tubes and the LEDs are provided on the first surfaces, and the sections are bent relative to each other so an angle between the first surfaces of adjacent sections is less than 180 degrees.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: February 9, 2021
    Assignee: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Yi-Cheng Lin, Hsin-Yi Tsai, Min-Wei Hung, Kuo-Cheng Huang, Hsin-Su Yu, Chiou-Lian Lai, Chung-Yao Hsu, Chao-Hung Cheng, Li-Wei Kuo, Hung-Che Chiang, Chih-Yi Yang