Abstract: The disclosure provides a server including a casing, a first circuit board and a replaceable power module. The first circuit board is disposed within the casing, wherein the first circuit board has at least one of a first electrical connector and a second electrical connector. The replaceable power module is assembled to one side of the casing, and the replaceable power module is electrically connected to the first electrical connector or the second electrical connector.

Abstract: A buffer assembly includes a screw rod, a base, a rotating element and a clamping ring. The rotating element is rotatably disposed on the base along a rotation axis. The rotating element includes a through hole. The clamping ring is detachably connected to the rotating element along a connection axis, so that the clamping ring is adapted to switch to a connected state or an open state. The clamping ring includes a position-limiting space, and the rotation axis is perpendicular to the connection axis. When the clamping ring is in the connected state, the position-limiting space and the through hole are located on the rotation axis, and the screw rod pushes the clamping ring to rotate so that the screw rod passes through the position-limiting space and the through hole. When the clamping ring is in the open state, the position-limiting space is misaligned with the rotation axis.

Abstract: An image processing unit including an always on circuit block and a non-always on circuit block is provided. When operating under a first operation mode, the non-always on circuit block receives a bias voltage from a power supply unit, so as to perform an image processing operation on an image input signal. When operating under a second operation mode, the non-always on circuit block stops receiving the bias voltage from the power supply unit, so as to stop the image processing operation, and at least a microcontroller of the non-always on circuit block is powered down. One of the always on circuit block and the non-always on circuit block controls the power supply unit to stop supplying the bias voltage to the non-always on circuit block according an event trigger signal, such that the non-always on circuit block enters the second operation mode from the first operation mode.

Abstract: An image processing unit including an always on circuit block and a non-always on circuit block is provided. When operating under a first operation mode, the non-always on circuit block receives a bias voltage from a power supply unit, so as to perform an image processing operation on an image input signal. When operating under a second operation mode, the non-always on circuit block stops receiving the bias voltage from the power supply unit, so as to stop the image processing operation, and at least a microcontroller of the non-always on circuit block is powered down. One of the always on circuit block and the non-always on circuit block controls the power supply unit to stop supplying the bias voltage to the non-always on circuit block according an event trigger signal, such that the non-always on circuit block enters the second operation mode from the first operation mode.

Abstract: A method for detecting signals in a TMDS transmission system having a channel established between a receiver and a transmitter includes separating loadings of the receiver from the channel, providing a first reference current in a first differential line of the channel, providing a second reference current in a second differential line of the channel, computing a difference between the first reference current and a current provided by the transmitter via the first differential line to obtain a first current difference, computing a difference between the second reference current and a current provided by the transmitter via the second differential line to obtain a second current difference, and determining an operating state of the transmitter according to the first current difference and the second current difference.

Abstract: A display apparatus including an analog-to-digital converter (ADC) module, a phase detecting module, and a clock generator is provided. The ADC module is used to receive a first analog video signal, and convert the first analog video signal into a digital signal according to a clock signal. The first analog video signal includes a first synchronous information and a first video information. The phase detecting module is used to receive the digital signal, and output a phase adjustment signal according to a part of the digital signal corresponding to the first synchronous information. The clock generator is used to output the clock signal according to the phase adjustment signal.

Abstract: A method for detecting signals in a TMDS transmission system is disclosed. A channel of the TMDS system is established between a receiver and a transmitter. The method includes separating loadings of the receiver from the channel, providing a first reference current in a first differential line of the channel, providing a second reference current in a second differential line of the channel, computing a difference between the first reference current and a current provided by the transmitter via the first differential line to obtain a first current difference, computing a difference between the second reference current and a current provided by the transmitter via the second differential line to obtain a second current difference, and determining an operating state of the transmitter according to the first current difference and the second current difference.

Abstract: A display apparatus including an analog-to-digital converter (ADC) module, a phase detecting module, and a clock generator is provided. The ADC module is used to receive a first analog video signal, and convert the first analog video signal into a digital signal according to a clock signal. The first analog video signal includes a first synchronous information and a first video information. The phase detecting module is used to receive the digital signal, and output a phase adjustment signal according to a part of the digital signal corresponding to the first synchronous information. The clock generator is used to output the clock signal according to the phase adjustment signal.

Abstract: A synchronization signal extraction device includes a signal reception terminal for receiving a composite video signal, a threshold voltage adjuster coupled to the signal reception terminal for adjusting a threshold voltage to a ratio of a first characteristic level and a second characteristic level of the composite video signal according to the first characteristic level and the second characteristic level, a slicer coupled to the signal reception terminal and the threshold voltage adjuster for slicing the composite video signal to extract a synchronization signal in the composite video signal, and a signal output terminal coupled to the slicer for outputting the extracted synchronization signal.

Abstract: A method and a device for improving debug time of a display apparatus are provided. The display apparatus includes an input signal connector for receiving an external input signal, an MCU, a bus and a plurality of units. The input signal connector is connected to the MCU via the bus, and the MCU is connected to the plurality of units via the bus. First, whether the MCU has entered the debug mode is detected; and when it is detected that the MCU has entered the debug mode, the bus switches to directly connect to the plurality of units in the display apparatus for allowing the external signal transmitted directly to the plurality of units for debugging.

Abstract: An apparatus and a method for detecting the sync signal of a data signal are disclosed. The apparatus includes a clamping unit, a subtraction unit and a detection unit. The clamping unit receives the data signal and varies the level of the data signal. The subtraction unit coupled to the clamping unit subtracts the level of the data signal from that of the output of the clamping unit and then outputs the subtracting result. The detection unit coupled to the subtraction unit detects the subtracting result from the subtraction unit and judges the sync signal in the data signal accordingly.

Abstract: A method for transmitting control signal of flat panel display is provided. The method is used for controlling a display panel module with a display control device. There is a transmission interface including a display data transmission channel between the display panel module and the display control device. The method includes the following steps: first, during data transmission, the display control device transmitting display data to the display panel module through the display data transmission channel; during blanking period, the display control device transmitting a control signal to control the display panel module by sharing the display data transmission channel.