Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.

Abstract: A method for fabricating a package structure is provided. The method includes premixing cellulose nanofibrils (CNFs) and a graphene material in a solvent to form a solution; removing the solvent from the solution to form a composite filler; mixing a prepolymeric material with the composite filler to form a composite material; and performing a molding process using the composite material.

Abstract: Optical devices and methods of manufacture are presented in which a mirror structure is utilized with an optical interposer. In embodiments a method patterns a substrate to form a recess with a sidewall, forms a mirror coating on the sidewall, deposits and patterns a material to form a first waveguide adjacent to the mirror coating, and bonds an optical interposer over the first waveguide.

Abstract: A manufacturing method for a flexible PCB includes steps of forming a copper circuit on a first surface of a polyimide backing, removing unwanted polyimide by a laser processing to expose the copper circuit on a second surface of the backing, removing leavings of polyimide generated by the laser processing, and making a surface treatment to the copper circuit exposed at the second surface of the backing.

Abstract: A new process is provided to create openings and interconnect patterns for the dual damascene structure. Four layers of dielectric are sequentially deposited over a pattern of interconnect metal. The via hole pattern is defined, the interconnect line pattern is next defined. The via pattern is etched though the upper layer of dielectric and through the stop layer. Only one etch processing step is used to create the desired vias and the desired interconnect line pattern. After the interconnect patterns and vias have been created in the four layers of dielectric, a barrier layer is blanket deposited, the metal is deposited for the dual damascene structure and the interconnect line pattern and polished.

Abstract: A CMOS Mask ROM semiconductor device is formed in P-well NMOS region of a silicon semiconductor substrate with FOX regions on the surface thereof. A method of forming the device includes forming gate oxide over the substrate between FOX regions; forming a control gate layer over the gate oxide. Then form a gate mask over the device with and pattern a gate electrode and the gate oxide layer by etching through mask openings. Next, form an LDD mask over the device exposing the gate. Ion implant a P type dopant of a first dosage level through mask openings forming reverse type LDD implant doped P type regions. Form spacers adjacent to the electrode over the substrate. Ion implant an N type dopant of a second dosage level through the opening in the mask and aside from the spacers and the electrode into exposed portions of the substrate.

Abstract: A new method of metal etching using a disposable metal antireflective coating process along with metal dry/wet etching is described. An insulating layer is provided over semiconductor device structures in and on a semiconductor substrate. Openings are made through the insulating layer to the semiconductor substrate and to the semiconductor device structures to be contacted. A barrier metal layer is deposited conformally over the insulating layer and within the openings. A metal layer is deposited over the barrier metal layer. The metal layer is covered with an antireflective coating. A layer of photoresist is coated onto the substrate and patterned to provide a photoresist mask. The antireflective coating, the metal layer and a portion of the barrier metal layer are etched away where the layers are not covered by the photoresist mask. The photoresist mask is removed.