Patents by Inventor Kuo-Chin Hung

Kuo-Chin Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9502303
    Abstract: A method for manufacturing a semiconductor device is provided. A substrate with an insulation formed thereon is provided, wherein the insulation has plural trenches, and the adjacent trenches are spaced apart from each other. A barrier layer is formed on an upper surface of the insulation and in sidewalls of the trenches, and the barrier layer comprises overhung portions corresponding to the trenches. A seed layer is formed on the barrier layer. Then, an upper portion of the seed layer formed on an upper surface of the barrier layer is removed. An upper portion of the barrier layer is removed for exposing the upper surface of the insulation. Afterwards, the conductors are deposited along the seed layer for filling up the trenches, wherein the top surfaces of the conductors are substantially aligned with the upper surface of the insulation.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: November 22, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kun-Ju Li, Kuo-Chin Hung, Po-Cheng Huang, Yu-Ting Li, Wu-Sian Sie, Chun-Tsen Lu, Wen-Chin Lin, Fu-Shou Tsai
  • Publication number: 20160336269
    Abstract: A semiconductor process includes the following steps. A dielectric layer having a recess is formed on a substrate. A barrier layer is formed to cover the recess, thereby the barrier layer having two sidewall parts. A conductive layer is formed on the barrier layer by an atomic layer deposition process, thereby the conductive layer having two sidewall parts. The two sidewall parts of the conductive layer are pulled down. A conductive material fills the recess and has a part contacting the two sidewall parts of the barrier layer protruding from the two sidewall parts of the conductive layer, wherein the equilibrium potential difference between the barrier layer and the conductive layer is different from the equilibrium potential difference between the barrier layer and the conductive material. Moreover, the present invention also provides a semiconductor structure formed by said semiconductor process.
    Type: Application
    Filed: May 12, 2015
    Publication date: November 17, 2016
    Inventors: Kun-Ju Li, Shu Min Huang, Kuo-Chin Hung, Po-Cheng Huang, Yu-Ting Li, Pei-Yu Lee, Min-Chuan Tsai, Chih-Hsun Lin, Wu-Sian Sie, Jen-Chieh Lin
  • Publication number: 20160300765
    Abstract: A method for manufacturing a semiconductor device is provided. A substrate with an insulation formed thereon is provided, wherein the insulation has plural trenches, and the adjacent trenches are spaced apart from each other. A barrier layer is formed on an upper surface of the insulation and in sidewalls of the trenches, and the barrier layer comprises overhung portions corresponding to the trenches. A seed layer is formed on the barrier layer. Then, an upper portion of the seed layer formed on an upper surface of the barrier layer is removed. An upper portion of the barrier layer is removed for exposing the upper surface of the insulation. Afterwards, the conductors are deposited along the seed layer for filling up the trenches, wherein the top surfaces of the conductors are substantially aligned with the upper surface of the insulation.
    Type: Application
    Filed: April 9, 2015
    Publication date: October 13, 2016
    Inventors: Kun-Ju Li, Kuo-Chin Hung, Po-Cheng Huang, Yu-Ting Li, Wu-Sian Sie, Chun-Tsen Lu, Wen-Chin Lin, Fu-Shou Tsai
  • Publication number: 20160013100
    Abstract: A via structure and a method of forming the same are provided. In the forming method of the present invention, a via is formed in a dielectric layer. Next, a U-shaped seed layer is formed in the via. After that, a conductive material is selectively formed in the via to form a conductive bulk layer in the via. Through the present invention, the purposes of effectively removing the overhang adjacent to the opening of the via and protecting the U-shaped seed layer in the via can be achieved.
    Type: Application
    Filed: August 17, 2014
    Publication date: January 14, 2016
    Inventors: Kun-Ju Li, Po-Cheng Huang, Chih-Chien Liu, Yu-Ting Li, Jen-Chieh Lin, Chang-Hung Kung, Wen-Chin Lin, Chih-Hsun Lin, Kuo-Chin Hung
  • Publication number: 20150331218
    Abstract: A lens made of glass, includes a first surface, a second surface, and a flange. The first surface has a locating portion and a first reference portion abutting against a first positioning object to fix a relative position between the first surface and the first positioning object in an axial direction and a radial direction thereof. The second surface has a second reference portion abutting against a second positioning object to fix a relative position between the second surface and the second positioning object in an axial direction thereof. The flange is formed on an outer periphery around the first surface and the second surface.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 19, 2015
    Applicant: CALIN TECHNOLOGY CO., LTD.
    Inventors: Chun-Ming CHEN, Kuo-Chin HUNG
  • Publication number: 20150331219
    Abstract: A lens assembly includes a lens barrel, a first lens, a second lens, and a third lens. The first lens is provided in the lens barrel with an outer periphery abutting against an inner wall of the lens barrel. The second lens abuts against the first lens, and there is a spacing formed between the second lens and the inner wall of the lens barrel. The third lens abuts against the second lens, and there is another spacing formed between the third lens and the inner wall of the lens barrel. With abutment relations of these lenses, relative positions between each lens can be fixed, and therefore the influence of allowable tolerance of the lens barrel upon optical performance is greatly reduced.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 19, 2015
    Applicant: CALIN TECHNOLOGY CO., LTD.
    Inventors: Chun-Ming CHEN, Kuo-Chin HUNG
  • Publication number: 20090109822
    Abstract: An external storage module includes a case, a storage device disposed in the case and a plurality of shock absorption elements. The case has a first connector and the storage device has a second connector corresponding to the first connector, wherein the second connector suits to electrically connect the first connector. The shock absorption elements are assembled at the sides of the storage device and the outer surface of each shock absorption element press and contact the inner surface of the case, wherein each shock absorption element includes a shock absorption body and a plurality of protruding structures disposed on the inner surface of the shock absorption body. The shock absorption bodies in association with the protruding structures are used to clamp at the sides of the storage device.
    Type: Application
    Filed: September 30, 2008
    Publication date: April 30, 2009
    Applicant: ASUSTEK COMPUTER INC.
    Inventor: Kuo-Chin Hung
  • Publication number: 20070062451
    Abstract: A stabilizing system for a plasma process is provided. The system has a high frequency power source, a plasma chamber, a control circuit for outputting a control signal, first switch element and an impedance matching network. The first switch element has a first, a second and a first switch control terminals, wherein the first and the first switch control terminals are coupled to the control circuit to determines whether the first and the second terminals element are connected or not according to the control signal. The impedance matching network has a first terminal coupled to the plasma chamber, a second terminal coupled to the high frequency power source and a matching control terminal coupled to the second terminal of the first switch element. In this way, whether an impedance matching auto-tune operation for the high frequency power is performed or not is determined based on the control signal.
    Type: Application
    Filed: September 20, 2005
    Publication date: March 22, 2007
    Inventors: Wen-Cheng Hsu, Kuo-Chin Hung, Chin-Ming Hsu, Hor-Ta Chaung, Chung-Jun Cheng