Patents by Inventor Kuo-Chuan Chen

Kuo-Chuan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136420
    Abstract: A thin film transistor includes a substrate, a semiconductor layer, a gate insulating layer, a gate, a source and a drain. The semiconductor layer is located above the substrate. The gate insulating layer is located above the semiconductor layer. The gate is located above the gate insulating layer and overlapping with the semiconductor layer. The gate includes a first portion, a second portion and a third portion. The first portion is extending along the surface of the gate insulating layer and directly in contact with the gate insulating layer. The second portion is separated from the gate insulating layer. Taking the surface of the gate insulating layer as a reference, the top surface of the second portion is higher than the top surface of the first portion. The third portion connects the first portion to the second portion. The source and the drain are electrically connected to the semiconductor layer.
    Type: Application
    Filed: December 1, 2022
    Publication date: April 25, 2024
    Applicant: AUO Corporation
    Inventors: Kuo-Jui Chang, Wen-Tai Chen, Chi-Sheng Chiang, Yu-Chuan Liao, Chien-Sen Weng, Ming-Wei Sun
  • Publication number: 20230382706
    Abstract: A production line for bottling a liquid product includes an ingredient preparation and batching system. The ingredient preparation and batching system includes a pre-mix station including a holding tank configured to store a hydrated ingredient. The ingredient preparation and batching system also includes a batch tank fluidly coupled to the pre-mix station and configured to receive a predetermined quantity of the hydrated ingredient from the holding tank. The production line also includes a bottling line fluidly coupled to the batch tank and configured to receive a batch of the liquid product from the batch tank and dispense the batch of the liquid product into a plurality of containers.
    Type: Application
    Filed: May 26, 2023
    Publication date: November 30, 2023
    Inventors: Abhishek Shukla, Steven Kuo-Chuan Chen
  • Publication number: 20190022590
    Abstract: The present invention provides a device for separating and purifying the collagen Type 2 in chicken bones, comprising a liquid fluid container, a raw liquid container, a membrane separation tank, a mixing tube, two high pressure metering motors, a precooler, two preheaters, a temperature controller, two one-way valves, two inlet control valves and two outlet control valves. The liquid extract of defatted chicken bones discharged from the raw liquid container and the liquid CO2 discharged from the liquid fluid container can be mixed uniformly in the mixing tube, and then fed into the membrane separation tank. The membrane separation tank produces small-molecular-weight peptides and large-molecular-weight collagen Type 2 harmlessly and efficiently.
    Type: Application
    Filed: October 5, 2017
    Publication date: January 24, 2019
    Inventors: Zer-Ran Yu, Hui-Chen Kuo, Be-Jen Wang, Po-Wen Yu, Hui-Chen Chung, Shu-Mei Lin, Kuo-Chuan Chen, Tsai-Jen Hung
  • Patent number: 6851168
    Abstract: A clamp for quickly, effectively and safely removing a cathode collar from an HDP deposition chamber for routine maintenance, cleaning or replacement of the collar. The clamp includes a pair of clamp plates which are capable of pivoting movement on respective ends of a connecting rod. A clamp shoe for gripping a corresponding edge of the annular collar is provided on the bottom end of each clamp plate, and a turnbuckle is fitted with a pair of threaded shafts which engage the upper end portions of the respective clamp plates. By rotating the turnbuckle, the threaded shafts are advanced away from each other against the clamp plates, which pivot on the connecting rod and cause the clamp shoes to tightly engage respective edges of the collar. The clamp is grasped to lift the collar from the chamber and replace the collar in the chamber after cleaning or maintenance.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: February 8, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Wen-Shan Chang, Jung-Chang Chen, Shih-Chang Hsu, Li-Chung Wang, Cheng-Chia Kuo, Jong-Min Lin, Kuo-Ming Yu, Da-Hsiang Chou, Kuo-Chuan Chen, Ming-Te Chen
  • Publication number: 20030233746
    Abstract: A clamp for quickly, effectively and safely removing a cathode collar from an HDP deposition chamber for routine maintenance, cleaning or replacement of the collar. The clamp includes a pair of clamp plates which are capable of pivoting movement on respective ends of a connecting rod. A clamp shoe for gripping a corresponding edge of the annular collar is provided on the bottom end of each clamp plate, and a turnbuckle is fitted with a pair of threaded shafts which engage the upper end portions of the respective clamp plates. By rotating the turnbuckle, the threaded shafts are advanced away from each other against the clamp plates, which pivot on the connecting rod and cause the clamp shoes to tightly engage respective edges of the collar. The clamp is grasped to lift the collar from the chamber and replace the collar in the chamber after cleaning or maintenance.
    Type: Application
    Filed: June 19, 2002
    Publication date: December 25, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Shan Chang, Jung-Chang Chen, Shih-Chang Hsu, Li-Chung Wang, Cheng-Chia Kuo, Jong-Min Lin, Kuo-Ming Yu, Da-Hsiang Chou, Kuo-Chuan Chen, Ming-Te Chen
  • Patent number: 6539624
    Abstract: A method for forming a wafer level package that is equipped with solder balls on a top surface and encapsulated by a stress buffer layer of an elastomeric material is disclosed. The method can be carried by first forming a plurality of solder balls on bond pads provided on a top surface of a wafer and then forming an elastomeric material layer, or any other flexible, compliant material layer to encapsulate the solder balls. The tip portions of the solder balls is then substantially exposed by an etching process of either dry etching or wet etching such that the solder balls can be connected electrically to a circuit board. The present invention further provides a wafer level package that is formed with solder balls on a top surface encapsulated in an elastomeric material layer. The elastomeric material layer serves both as a stress buffer and a thermal expansion buffer such that the integrity and reliability of IC devices severed from the wafer can be maintained.
    Type: Grant
    Filed: March 27, 1999
    Date of Patent: April 1, 2003
    Assignee: Industrial Technology Research Institute
    Inventors: Ling-Chen Kung, Kuo-Chuan Chen, Ruoh-Huey Uang, Szu-Wei Lu
  • Patent number: 6444561
    Abstract: A method for forming solder bumps for a flip-chip bonding process wherein the bumps have substantially the same height and structures formed by the method are described. In the method, a pre-processed semiconductor substrate that has a plurality of metal traces formed on a top surface is first provided. At least two solder non-wettable masking strips are then deposited on top of and perpendicular to the plurality of metal traces. The at least two solder non-wettable masking strips are deposited spaced-apart at a predetermined spacing sufficient for forming a bond pad therein-between on the plurality of metal traces. Finally, a solder material is deposited onto the bond pads forming solder bumps which are then reflown into solder balls.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: September 3, 2002
    Assignee: Industrial Technology Research Institute
    Inventors: Chia-Chung Wang, Chung-Tao Chang, Kuo-Chuan Chen
  • Patent number: 6358836
    Abstract: A method for forming a wafer level package by incorporating an insulating pad of an elastic material under a dummy plug is described. In the method, a multiplicity of pads or islands formed of an elastic material is first formed on a pre-processed semiconductor substrate before a multiplicity of dummy via plugs are formed on top. The dummy via plugs are used as a support structure for building I/O redistribution lines (i.e. metal traces) thereon such that I/O bond pads may be built for supporting solder bumps or solder balls. The multiplicity of insulating pads is used for stress relief during a bonding process with the solder ball built on top without the conventional defect of cracking due to high elasticity of the material when a large area insulating layer is deposited on top.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: March 19, 2002
    Assignee: Industrial Technology Research Institute
    Inventors: Szu-Wei Lu, Kuo-Chuan Chen, Jyh-Rong Lin, Ruoh-Huey Wang, Hsu-Tien Hu, Hsin-Chien Huang
  • Patent number: 6277669
    Abstract: A method for fabricating a wafer level package and packages formed are disclosed. In the method, an elastomeric material layer is first deposited on top of a passivation layer by a printing, coating or laminating method to form a plurality of isolated islands. The islands may have a thickness of less than 100 &mgr;m. Metal traces for I/O redistribution are then formed to connect the isolated islands with bond pads provided on the surface of the wafer such that one bond pad is connected electrically to one isolated island. On top of the metal trace is then deposited an organic material for insulation with the metal trace on top of the isolated islands exposed. After an UBM layer is formed on top of the metal traces that are exposed on the isolated islands, solder balls of suitable size may be planted by a plating technique, a printing technique or a pick and place technique to complete the wafer level package.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: August 21, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Ling-Chen Kung, Jyh-Rong Lin, Kuo-Chuan Chen
  • Patent number: 6137708
    Abstract: A multi-chip sensing device package and a method for forming such package are disclosed. The multi-chip sensing device package is built on an electrically insulative substrate such as a ceramic material, by using a thick film printing technique to print a multiplicity of bonding pads including interconnection pads and output pads on the surface of the rigid, insulated substrate. After a plurality of sensing elements are bonded by solder to the plurality of bonding pads, the sensing device may be connected to either lead fingers of a lead frame, or to J-leads formed integral with the device for providing electrical communication with an external circuit. The device may further be packaged in a plastic housing with a top surface of the device exposing to the environment for performing its detection function.
    Type: Grant
    Filed: August 27, 1998
    Date of Patent: October 24, 2000
    Assignee: Industrial Technology Research Institute
    Inventors: Yuh-Jiuan Lin, Ming-Chang Shih, Kuo-Chuan Chen, Tzong-Zeng Wuh
  • Patent number: 5945774
    Abstract: An improved crystal oscillator package is described in which the crystal oscillators are attached to ceramic substrates by means of connectors, formed from materials such as silver-platinum and silver, using thick film techniques. An optional opening in the substrate allows a liquid or gaseous medium to make easy contact with the oscillator chips' electrodes on which a biosensitive film of a specific receptor has been deposited, thereby allowing the crystals to act as detectors. In the case of the multi-oscillator module, several different detectors may be present in the same unit.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: August 31, 1999
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Chang Shih, Kuo-Chuan Chen