Patents by Inventor Kuo-Chuan Chen
Kuo-Chuan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12183799Abstract: A semiconductor device includes a first channel member over a first backside dielectric feature, a first gate structure engaging the first channel member, a second channel member over a second backside dielectric feature, a second gate structure engaging the second channel member, and a first isolation feature includes a first portion laterally between the first and second backside dielectric features and a second portion laterally between the first and second gate structures. The first isolation feature is in physical contact with the first and second gate structures.Type: GrantFiled: August 10, 2023Date of Patent: December 31, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jung-Chien Cheng, Kuo-Cheng Chiang, Shi Ning Ju, Guan-Lin Chen, Jia-Chuan You, Chia-Hao Chang, Chih-Hao Wang, Kuan-Lun Cheng
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Publication number: 20240381659Abstract: A semiconductor memory structure includes a gate structure, a ferroelectric layer over the gate structure, a channel layer over the ferroelectric layer, an intervening structure between the ferroelectric layer and the channel layer, and a source structure and a drain structure separated from each other over the channel layer. A thickness of the intervening structure is less than a thickness of the channel layer and less than a thickness of the ferroelectric layer. The channel layer and the intervening structure include different materials.Type: ApplicationFiled: May 9, 2023Publication date: November 14, 2024Inventors: PO-TING LIN, CHUNG-TE LIN, HAI-CHING CHEN, YU-MING LIN, KUO-CHANG CHIANG, YAN-YI CHEN, WU-WEI TSAI, YU-CHUAN SHIH
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Patent number: 12114547Abstract: Provided is a display panel, including a substrate, multiple pixel circuits, an insulating layer, multiple first electrodes, a first isolation structure, and a second isolation structure. The pixel circuits are located on the substrate. The insulating layer is located on the pixel circuits and has multiple through holes. The first electrodes are located on the insulating layer and are respectively electrically connected to the pixel circuits through the through holes. The first isolation structure is located on the insulating layer and overlaps the through holes. The second isolation structure includes multiple separating parts and multiple cover parts. The separating parts and the first isolation structure at least partially overlap, and the cover parts respectively overlap the through holes and the first isolation structure.Type: GrantFiled: November 5, 2021Date of Patent: October 8, 2024Assignee: Au Optronics CorporationInventors: Kuo-Jui Chang, Wen-Tai Chen, Chi-Sheng Chiang, Yu-Chuan Liao, Chien-Sen Weng, Ming-Wei Sun
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Publication number: 20240217799Abstract: An ingredient preparation and batching system may include a first hydrated ingredient pre-mix station including a first holding tank configured to store a first hydrated ingredient consisting of water and one or more non-time constrained ingredients. The ingredient preparation and batching system may include a dry ingredient pre-mix station including a first hopper configured to store a first ingredient in dry form, a second hopper configured to store a second ingredient in dry form, and a mixer fluidly coupled to the first hopper and the second hopper. The mixer is configured to receive and mix the first ingredient and the second ingredient to form an ingredient mix. The ingredient preparation and batching system may include a batch tank fluidly coupled to the first holding tank and the mixer.Type: ApplicationFiled: January 3, 2024Publication date: July 4, 2024Inventors: Abhishek Shukla, Steven Kuo-Chuan Chen
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Publication number: 20230382706Abstract: A production line for bottling a liquid product includes an ingredient preparation and batching system. The ingredient preparation and batching system includes a pre-mix station including a holding tank configured to store a hydrated ingredient. The ingredient preparation and batching system also includes a batch tank fluidly coupled to the pre-mix station and configured to receive a predetermined quantity of the hydrated ingredient from the holding tank. The production line also includes a bottling line fluidly coupled to the batch tank and configured to receive a batch of the liquid product from the batch tank and dispense the batch of the liquid product into a plurality of containers.Type: ApplicationFiled: May 26, 2023Publication date: November 30, 2023Inventors: Abhishek Shukla, Steven Kuo-Chuan Chen
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Publication number: 20190022590Abstract: The present invention provides a device for separating and purifying the collagen Type 2 in chicken bones, comprising a liquid fluid container, a raw liquid container, a membrane separation tank, a mixing tube, two high pressure metering motors, a precooler, two preheaters, a temperature controller, two one-way valves, two inlet control valves and two outlet control valves. The liquid extract of defatted chicken bones discharged from the raw liquid container and the liquid CO2 discharged from the liquid fluid container can be mixed uniformly in the mixing tube, and then fed into the membrane separation tank. The membrane separation tank produces small-molecular-weight peptides and large-molecular-weight collagen Type 2 harmlessly and efficiently.Type: ApplicationFiled: October 5, 2017Publication date: January 24, 2019Inventors: Zer-Ran Yu, Hui-Chen Kuo, Be-Jen Wang, Po-Wen Yu, Hui-Chen Chung, Shu-Mei Lin, Kuo-Chuan Chen, Tsai-Jen Hung
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Patent number: 6851168Abstract: A clamp for quickly, effectively and safely removing a cathode collar from an HDP deposition chamber for routine maintenance, cleaning or replacement of the collar. The clamp includes a pair of clamp plates which are capable of pivoting movement on respective ends of a connecting rod. A clamp shoe for gripping a corresponding edge of the annular collar is provided on the bottom end of each clamp plate, and a turnbuckle is fitted with a pair of threaded shafts which engage the upper end portions of the respective clamp plates. By rotating the turnbuckle, the threaded shafts are advanced away from each other against the clamp plates, which pivot on the connecting rod and cause the clamp shoes to tightly engage respective edges of the collar. The clamp is grasped to lift the collar from the chamber and replace the collar in the chamber after cleaning or maintenance.Type: GrantFiled: June 19, 2002Date of Patent: February 8, 2005Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventors: Wen-Shan Chang, Jung-Chang Chen, Shih-Chang Hsu, Li-Chung Wang, Cheng-Chia Kuo, Jong-Min Lin, Kuo-Ming Yu, Da-Hsiang Chou, Kuo-Chuan Chen, Ming-Te Chen
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Publication number: 20030233746Abstract: A clamp for quickly, effectively and safely removing a cathode collar from an HDP deposition chamber for routine maintenance, cleaning or replacement of the collar. The clamp includes a pair of clamp plates which are capable of pivoting movement on respective ends of a connecting rod. A clamp shoe for gripping a corresponding edge of the annular collar is provided on the bottom end of each clamp plate, and a turnbuckle is fitted with a pair of threaded shafts which engage the upper end portions of the respective clamp plates. By rotating the turnbuckle, the threaded shafts are advanced away from each other against the clamp plates, which pivot on the connecting rod and cause the clamp shoes to tightly engage respective edges of the collar. The clamp is grasped to lift the collar from the chamber and replace the collar in the chamber after cleaning or maintenance.Type: ApplicationFiled: June 19, 2002Publication date: December 25, 2003Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Wen-Shan Chang, Jung-Chang Chen, Shih-Chang Hsu, Li-Chung Wang, Cheng-Chia Kuo, Jong-Min Lin, Kuo-Ming Yu, Da-Hsiang Chou, Kuo-Chuan Chen, Ming-Te Chen
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Patent number: 6539624Abstract: A method for forming a wafer level package that is equipped with solder balls on a top surface and encapsulated by a stress buffer layer of an elastomeric material is disclosed. The method can be carried by first forming a plurality of solder balls on bond pads provided on a top surface of a wafer and then forming an elastomeric material layer, or any other flexible, compliant material layer to encapsulate the solder balls. The tip portions of the solder balls is then substantially exposed by an etching process of either dry etching or wet etching such that the solder balls can be connected electrically to a circuit board. The present invention further provides a wafer level package that is formed with solder balls on a top surface encapsulated in an elastomeric material layer. The elastomeric material layer serves both as a stress buffer and a thermal expansion buffer such that the integrity and reliability of IC devices severed from the wafer can be maintained.Type: GrantFiled: March 27, 1999Date of Patent: April 1, 2003Assignee: Industrial Technology Research InstituteInventors: Ling-Chen Kung, Kuo-Chuan Chen, Ruoh-Huey Uang, Szu-Wei Lu
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Patent number: 6444561Abstract: A method for forming solder bumps for a flip-chip bonding process wherein the bumps have substantially the same height and structures formed by the method are described. In the method, a pre-processed semiconductor substrate that has a plurality of metal traces formed on a top surface is first provided. At least two solder non-wettable masking strips are then deposited on top of and perpendicular to the plurality of metal traces. The at least two solder non-wettable masking strips are deposited spaced-apart at a predetermined spacing sufficient for forming a bond pad therein-between on the plurality of metal traces. Finally, a solder material is deposited onto the bond pads forming solder bumps which are then reflown into solder balls.Type: GrantFiled: October 2, 2000Date of Patent: September 3, 2002Assignee: Industrial Technology Research InstituteInventors: Chia-Chung Wang, Chung-Tao Chang, Kuo-Chuan Chen
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Patent number: 6358836Abstract: A method for forming a wafer level package by incorporating an insulating pad of an elastic material under a dummy plug is described. In the method, a multiplicity of pads or islands formed of an elastic material is first formed on a pre-processed semiconductor substrate before a multiplicity of dummy via plugs are formed on top. The dummy via plugs are used as a support structure for building I/O redistribution lines (i.e. metal traces) thereon such that I/O bond pads may be built for supporting solder bumps or solder balls. The multiplicity of insulating pads is used for stress relief during a bonding process with the solder ball built on top without the conventional defect of cracking due to high elasticity of the material when a large area insulating layer is deposited on top.Type: GrantFiled: June 16, 2000Date of Patent: March 19, 2002Assignee: Industrial Technology Research InstituteInventors: Szu-Wei Lu, Kuo-Chuan Chen, Jyh-Rong Lin, Ruoh-Huey Wang, Hsu-Tien Hu, Hsin-Chien Huang
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Patent number: 6277669Abstract: A method for fabricating a wafer level package and packages formed are disclosed. In the method, an elastomeric material layer is first deposited on top of a passivation layer by a printing, coating or laminating method to form a plurality of isolated islands. The islands may have a thickness of less than 100 &mgr;m. Metal traces for I/O redistribution are then formed to connect the isolated islands with bond pads provided on the surface of the wafer such that one bond pad is connected electrically to one isolated island. On top of the metal trace is then deposited an organic material for insulation with the metal trace on top of the isolated islands exposed. After an UBM layer is formed on top of the metal traces that are exposed on the isolated islands, solder balls of suitable size may be planted by a plating technique, a printing technique or a pick and place technique to complete the wafer level package.Type: GrantFiled: September 15, 1999Date of Patent: August 21, 2001Assignee: Industrial Technology Research InstituteInventors: Ling-Chen Kung, Jyh-Rong Lin, Kuo-Chuan Chen
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Patent number: 6137708Abstract: A multi-chip sensing device package and a method for forming such package are disclosed. The multi-chip sensing device package is built on an electrically insulative substrate such as a ceramic material, by using a thick film printing technique to print a multiplicity of bonding pads including interconnection pads and output pads on the surface of the rigid, insulated substrate. After a plurality of sensing elements are bonded by solder to the plurality of bonding pads, the sensing device may be connected to either lead fingers of a lead frame, or to J-leads formed integral with the device for providing electrical communication with an external circuit. The device may further be packaged in a plastic housing with a top surface of the device exposing to the environment for performing its detection function.Type: GrantFiled: August 27, 1998Date of Patent: October 24, 2000Assignee: Industrial Technology Research InstituteInventors: Yuh-Jiuan Lin, Ming-Chang Shih, Kuo-Chuan Chen, Tzong-Zeng Wuh
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Patent number: 5945774Abstract: An improved crystal oscillator package is described in which the crystal oscillators are attached to ceramic substrates by means of connectors, formed from materials such as silver-platinum and silver, using thick film techniques. An optional opening in the substrate allows a liquid or gaseous medium to make easy contact with the oscillator chips' electrodes on which a biosensitive film of a specific receptor has been deposited, thereby allowing the crystals to act as detectors. In the case of the multi-oscillator module, several different detectors may be present in the same unit.Type: GrantFiled: March 28, 1997Date of Patent: August 31, 1999Assignee: Industrial Technology Research InstituteInventors: Ming-Chang Shih, Kuo-Chuan Chen
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Patent number: RE50271Abstract: A zoom lens arranged along an optical axis includes a first lens group and a second lens group. The second lens group has at least one aspheric lens. The first lens group moves toward an image side and the second lens group moves away from the image side along the optical axis during zooming. The first lens group is moved for focusing, and the second lens group is moved for zooming.Type: GrantFiled: March 31, 2022Date of Patent: January 14, 2025Assignee: Young Optics Inc.Inventors: Kuo-Chuan Wang, Bing-Ju Chiang, Pin-Hsuan Hsieh, Kai-Yun Chen, Yu-Hung Chou