Patents by Inventor Kuo-Chung Lin

Kuo-Chung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240139142
    Abstract: Provided is a method for preventing or treating a liver disease, including administering a therapeutically effective amount of pharmaceutical composition to a subject in need, and the pharmaceutical composition includes the isothiocyanate structural modified compound and a pharmaceutically acceptable carrier thereof.
    Type: Application
    Filed: September 14, 2023
    Publication date: May 2, 2024
    Applicants: TAIPEI VETERANS GENERAL HOSPITAL, NATIONAL YANG MING CHIAO TUNG UNIVERSITY, PHARMAESSENTIA CORPORATION
    Inventors: Jaw-Ching WU, Yung-Sheng CHANG, Kuo-Hsi KAO, Chan-Kou HWANG, Ko-Chung LIN
  • Publication number: 20240128178
    Abstract: A method of forming a semiconductor structure is provided, and includes trimming a first substrate to form a recess on a sidewall of the first substrate. A conductive structure is formed in the first substrate. The method includes bonding the first substrate to a carrier. The method includes thinning down the first substrate. The method also includes forming a dielectric material in the recess and over a top surface of the thinned first substrate. The method further includes performing a planarization process to remove the dielectric material and expose the conductive structure over the top surface. In addition, the method includes removing the carrier from the first substrate.
    Type: Application
    Filed: February 8, 2023
    Publication date: April 18, 2024
    Inventors: Yu-Hung LIN, Wei-Ming WANG, Su-Chun YANG, Jih-Churng TWU, Shih-Peng TAI, Kuo-Chung YEE
  • Publication number: 20240096722
    Abstract: In an embodiment, a package includes a first device and a second device attached to a first redistribution structure, wherein the second device includes a second redistribution structure, a first die disposed over the second redistribution structure, a first encapsulant extending along sidewalls of the first die, a first via extending through the first encapsulant, a third redistribution structure disposed over the first encapsulant and including a first metallization pattern connecting to the first via, a second die disposed over the third redistribution structure, and a second encapsulant extending along sidewalls of the second die, the first die and the second die being free of through substrate vias. The package also includes a third encapsulant disposed over the first redistribution structure and surrounding sidewalls of the first device and the second device, wherein top surfaces of the second encapsulant and the third encapsulant are level with each other.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 21, 2024
    Inventors: Kuo-Chung Yee, Chia-Hui Lin, Shih-Peng Tai
  • Publication number: 20240096830
    Abstract: A method includes forming a first sealing layer at a first edge region of a first wafer; and bonding the first wafer to a second wafer to form a wafer stack. At a time after the bonding, the first sealing layer is between the first edge region of the first wafer and a second edge region of the second wafer, with the first edge region and the second edge region comprising bevels. An edge trimming process is then performed on the wafer stack. After the edge trimming process, the second edge region of the second wafer is at least partially removed, and a portion of the first sealing layer is left as a part of the wafer stack. An interconnect structure is formed as a part of the second wafer. The interconnect structure includes redistribution lines electrically connected to integrated circuit devices in the second wafer.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 21, 2024
    Inventors: Yu-Yi Huang, Yu-Hung Lin, Wei-Ming Wang, Chen Chen, Shih-Peng Tai, Kuo-Chung Yee
  • Publication number: 20240087986
    Abstract: A semiconductor device including a substrate, a semiconductor package, a thermal conductive bonding layer, and a lid is provided. The semiconductor package is disposed on the substrate. The thermal conductive bonding layer is disposed on the semiconductor package. The lid is attached to the thermal conductive bonding layer and covers the semiconductor package to prevent coolant from contacting the semiconductor package.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chun-Hui Yu, Jeng-Nan Hung, Kuo-Chung Yee, Po-Fan Lin
  • Publication number: 20160120068
    Abstract: The present invention provides a heat spreading tape including at least one heat spreading layer adapted for heat dissipation and at least one heat insulating layer adhesively attached to the heat spreading layer. Void regions are formed in the at least one heat insulating layer and are adapted for acting as heat transfer barriers in a direction perpendicular to the major surfaces of the heat spreading tape, i.e. the thickness tape.
    Type: Application
    Filed: May 12, 2014
    Publication date: April 28, 2016
    Inventors: Pei Tien, Mihee Lee, Chao-Yuan Wang, Han-Yi Chung, Ching-Yi Liu, Kuo-Chung Lin, Wei-Yu Chen
  • Patent number: 6856936
    Abstract: Systems and methods to identify an event(s) representing a discontinuity in the impedance of a transmission line such as a wire cable using time domain reflectrometry (TDR) are presented. According to an exemplary embodiment, multiple layers of digital signal processing techniques are implemented in an algorithm that combats the smearing effect of a wide launch pulses with the reflection due to an event. The algorithm focuses on wavelet decomposition and additional post processing to produce a well-defined signal that allows easy identification of the reflected signal while preserving critical information, such as the location of the event and relative signal strength.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: February 15, 2005
    Assignee: Turnstone Systems, Inc.
    Inventors: Franz Chen, Kuo-Chung Lin
  • Publication number: 20030045405
    Abstract: The present invention relates to a pogo stick structure, more particularly, a pogo stick comprising a foot-pad housing with handlebars thereof and a support rod; wherein, a foot-pad housing rises at the position of the foot pads and forms a hollow tube creating space for placing a compression spring therein; the installation of the tube helps to stabilize the compression spring while making constrained and released movements, and also reduces great height of the foot pads to the ground which can decrease user's fear in operating the pogo stick; moreover, the external flange of the foot pads is mounted with a plurality of LED flash lights, and under the foot pads installs a controller which switches on/off the LED flash lights and creates sound.
    Type: Application
    Filed: August 30, 2001
    Publication date: March 6, 2003
    Inventor: Kuo-Chung Lin
  • Patent number: 5584331
    Abstract: A shutter including a casing, two chain transmission mechanisms bilaterally and vertically mounted inside said casing, two linkages suspended from the top rail of the casing on the inside, a set of louvers pivotably connected between the linkages, a power drive controlled to turn the chain transmission mechanisms, and two hook members fastened to the chain transmission mechanisms and moved to carry the linkages and the louvers between the active position and the inactive position, louvers being carried turned between the horizontal position and the vertical position when the linkages are moved to the active position and the chain transmission mechanisms are continuously turned to a certain extent.
    Type: Grant
    Filed: November 29, 1995
    Date of Patent: December 17, 1996
    Inventor: Kuo-Chung Lin