Patents by Inventor Kuo-Chyuan Tzeng

Kuo-Chyuan Tzeng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250241212
    Abstract: Some embodiments relate to a method for forming an integrated chip. The method includes forming a first electrode over a substrate. A data storage layer is formed on the first electrode. A conductive layer is formed on the data storage layer. A buffer layer is formed on the conductive layer. The buffer layer comprises a first material. A second electrode is formed on the buffer layer. The second electrode comprises a second material different from the first material.
    Type: Application
    Filed: April 8, 2025
    Publication date: July 24, 2025
    Inventors: Chung-Chiang Min, Chang-Chih Huang, Yuan-Tai Tseng, Kuo-Chyuan Tzeng, Yihuei Zhu
  • Patent number: 12369503
    Abstract: A dielectric isolation layer having a planar top surface is formed over a substrate. A first electrode and a second electrode are formed over the planar top surface. An insulating matrix layer is formed around the first electrode and the second electrode. A phase change material (PCM) line is formed over the insulating matrix layer. A first end portion of the PCM line contacts a top surface of the first electrode and a second end portion of the PCM line contacts a top surface of the second electrode. A dielectric encapsulation layer is formed on sidewalls of the PCM line and over the PCM line and over a top surface of the insulating matrix layer. A heater line is formed prior to, or after, formation of the PCM line. The heater line underlies the PCM line or overlies the PCM line. A PCM switch device may be provided.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: July 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Tsung-Hsueh Yang, Chang-Chih Huang, Fu-Ting Sung, Kuo-Chyuan Tzeng
  • Publication number: 20250224630
    Abstract: A method for manufacturing a semiconductor device includes: forming a first dielectric layer on a semiconductor substrate; forming a plurality of spaced-apart electrodes in the first dielectric layer; forming a patterned stack on the electrodes opposite to the semiconductor substrate, the patterned stack including a plurality of stack portions spaced apart from each other, each of the stack portions including a heater portion disposed on and connected to at least one of the electrodes and a phase change material portion disposed on the heater portion opposite to the at least one of the electrodes; forming a second dielectric layer to conformally cover the patterned stack; and forming a third dielectric layer on the second dielectric layer, the third dielectric layer being formed with a plurality of air gaps such that the stack portions are spaced apart from each other by the air gaps.
    Type: Application
    Filed: January 8, 2024
    Publication date: July 10, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Wen WANG, Chang-Chih HUANG, Kuo-Chyuan TZENG, Han-Yu CHEN
  • Publication number: 20250224627
    Abstract: A semiconductor device includes a semiconductor substrate and a spatial light modulator. The spatial light modulator is disposed on the semiconductor substrate, and includes a plurality of pixels. Each of the pixels includes a heater portion, a phase change material portion, and a pair of spacers. The phase change material portion is disposed on the heater portion opposite to the semiconductor substrate. The spacers are disposed on the heater portion and laterally cover the phase change material portion.
    Type: Application
    Filed: January 9, 2024
    Publication date: July 10, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Wen WANG, Chang-Chih HUANG, Kuo-Chyuan TZENG
  • Patent number: 12354951
    Abstract: Various embodiments of the present disclosure are directed towards methods for forming conductive lines and conductive sockets using mandrels with turns, as well as the resulting conductive lines and sockets. A conductive socket of the present disclosure may have a top layout with at least one turn and with a width that is substantially the same as that of conductive lines along the at least one turn. Such a top layout may reduce loading during formation of the conductive socket. Conductive lines of the present disclosure may comprise outer conductive lines and inner conductive lines having ends laterally offset from ends of the outer conductive lines along lengths of the conductive lines. Formation of the inner and outer conductive lines using a mandrel with a turn may enlarge a process window while cutting ends of a sidewall spacer structure from which the inner and outer conductive lines are formed.
    Type: Grant
    Filed: February 2, 2022
    Date of Patent: July 8, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Harry-Hak-Lay Chuang, Kuo-Chyuan Tzeng, Wan-Chen Chen, Chang-Chih Huang
  • Publication number: 20250204287
    Abstract: Phase change material (PCM) switches and methods of fabrication thereof that provide improved thermal confinement within a phase change material layer. A PCM switch may include a dielectric capping layer between a heater pad and the phase change material layer of the PCM switch that is laterally-confined such opposing sides of the dielectric capping layer the heater pad may form continuous surfaces extending transverse to the signal transmission pathway across the PCM switch. Heat transfer from the heater pad through the dielectric capping layer to the phase change material layer may be predominantly vertical, with minimal thermal dissipation along a lateral direction. The localized heating of the phase change material may improve the efficiency of the PCM switch enabling lower bias voltages, minimize the formation of regions of intermediate resistivity in the PCM switch, and improve the parasitic capacitance characteristics of the PCM switch.
    Type: Application
    Filed: March 4, 2025
    Publication date: June 19, 2025
    Inventors: Kuo-Pin Chang, Yu-Wei Ting, Tsung-Hao Yeh, Kuo-Ching Huang, Kuo-Chyuan Tzeng
  • Patent number: 12302767
    Abstract: Some embodiments relate to a memory device. The memory device includes a first electrode overlying a substrate. A data storage layer is disposed on the first electrode. A second electrode overlies the data storage layer. A buffer layer is disposed between the data storage layer and the second electrode.
    Type: Grant
    Filed: December 7, 2022
    Date of Patent: May 13, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chiang Min, Chang-Chih Huang, Yuan-Tai Tseng, Kuo-Chyuan Tzeng, Yihuei Zhu
  • Patent number: 12268103
    Abstract: Phase change material (PCM) switches and methods of fabrication thereof that provide improved thermal confinement within a phase change material layer. A PCM switch may include a dielectric capping layer between a heater pad and the phase change material layer of the PCM switch that is laterally-confined such opposing sides of the dielectric capping layer the heater pad may form continuous surfaces extending transverse to the signal transmission pathway across the PCM switch. Heat transfer from the heater pad through the dielectric capping layer to the phase change material layer may be predominantly vertical, with minimal thermal dissipation along a lateral direction. The localized heating of the phase change material may improve the efficiency of the PCM switch enabling lower bias voltages, minimize the formation of regions of intermediate resistivity in the PCM switch, and improve the parasitic capacitance characteristics of the PCM switch.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: April 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Kuo-Pin Chang, Yu-Wei Ting, Tsung-Hao Yeh, Kuo-Chyuan Tzeng, Kuo-Ching Huang
  • Publication number: 20250098555
    Abstract: A spatial light modulator device includes an array of spatial light modulator cells located over a substrate. Each of the spatial light modulator cells includes: a layer stack including a phase change material plate, a spacer dielectric material plate that underlies the phase change material plate, and a metallic heater plate underlying the spacer dielectric material plate and including outer sidewalls; and a pair of bottom electrode via structures contacting a respective surface segment of a bottom surface of the metallic heater plate. Each of the outer sidewalls of the metallic heater plate is vertically coincident with a respective sidewall of the spacer dielectric material plate and with a respective sidewall of the phase change material plate.
    Type: Application
    Filed: March 18, 2024
    Publication date: March 20, 2025
    Inventors: Chang-Chih Huang, Yu-Wen Wang, Wei-Fang Chen, Han-Yu Chen, Kuo-Chyuan Tzeng
  • Publication number: 20240349630
    Abstract: A phase change memory device includes a first electrode, a second electrode, a phase change region, a first spacer and a second spacer. The second electrode is disposed over the first electrode. The phase change region is disposed between the first and second electrodes. The first spacer laterally covers the phase change region. The second spacer laterally covers the first spacer, and has a thermal conductivity smaller than that of the first spacer.
    Type: Application
    Filed: June 27, 2024
    Publication date: October 17, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yuan-Tai TSENG, Chang-Chih HUANG, Kuo-Chyuan TZENG
  • Publication number: 20240276897
    Abstract: A phase-change material switch may include a first interconnect-level dielectric, a heat spreader formed within the first interconnect-level dielectric, a second interconnect-level dielectric formed over the heat spreader, a phase change material element formed in or over the second interconnect-level dielectric, a first electrode and a second electrode in electrically conductive contact with the phase change material element, and a heating element coupled to the phase change material element and configured to supply a heat pulse to the phase change material element. The heat spreader may be located proximate to a first one of the phase change material element and the heating element, and the heat spreader may be smaller than the phase change material element. The heat spreader may be form using materials and processes similar to those used to form electrical interconnects, but unlike electrical interconnects, the heat spreader may be electrically isolated from electrical interconnects.
    Type: Application
    Filed: February 15, 2023
    Publication date: August 15, 2024
    Inventors: Han-Yu CHEN, Chang-Chih HUANG, Yu-Wen WANG, Yi-Han CHENG, Kuo-Chyuan TZENG
  • Patent number: 12048258
    Abstract: A phase change memory device includes a first electrode, a second electrode, a phase change region, a first spacer and a second spacer. The second electrode is disposed over the first electrode. The phase change region is disposed between the first and second electrodes. The first spacer laterally covers the phase change region. The second spacer laterally covers the first spacer, and has a thermal conductivity smaller than that of the first spacer.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: July 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yuan-Tai Tseng, Chang-Chih Huang, Kuo-Chyuan Tzeng
  • Publication number: 20240057346
    Abstract: Device structures and methods for forming the same are provided. A device structure according to the present disclosure includes a first electrode and a second electrode disposed over an etch stop layer (ESL), a first dielectric layer disposed between the first electrode and the second electrode, a phase-change material layer disposed over the first electrode, the first dielectric layer and the second electrode, an insulator layer disposed over the phase-change material layer, a metal feature disposed over the insulator layer, and a second dielectric layer disposed over the insulator layer, the first electrode, the second electrode, and the metal feature.
    Type: Application
    Filed: January 6, 2023
    Publication date: February 15, 2024
    Inventors: Fu-Ting Sung, Tsung-Hsueh Yang, Chang-Ming Wu, Chang-Chih Huang, Yu-Wen Wang, Kuo-Chyuan Tzeng
  • Publication number: 20240008373
    Abstract: In various embodiments, an improved structure for a PCM device is provided. The improved structure is configured to help prevent heat dissipation. In one example, the PCM device is an PCM RF Switch, which has a substrate, a heater, a dielectric/insulator layer, oxidation layers, electrodes, a PCM region, and/or any other components. The oxidation layers are configured to help prevent heat dissipation from the heater.
    Type: Application
    Filed: June 29, 2022
    Publication date: January 4, 2024
    Inventors: Chang-Chih Huang, Han-Yu Chen, Yu-Sheng Chen, Kuo-Chyuan Tzeng
  • Publication number: 20230403954
    Abstract: Phase change material (PCM) switches and methods of fabrication thereof that provide improved thermal confinement within a phase change material layer. A PCM switch may include a dielectric capping layer between a heater pad and the phase change material layer of the PCM switch that is laterally-confined such opposing sides of the dielectric capping layer the heater pad may form continuous surfaces extending transverse to the signal transmission pathway across the PCM switch. Heat transfer from the heater pad through the dielectric capping layer to the phase change material layer may be predominantly vertical, with minimal thermal dissipation along a lateral direction. The localized heating of the phase change material may improve the efficiency of the PCM switch enabling lower bias voltages, minimize the formation of regions of intermediate resistivity in the PCM switch, and improve the parasitic capacitance characteristics of the PCM switch.
    Type: Application
    Filed: June 9, 2022
    Publication date: December 14, 2023
    Inventors: Kuo-Pin Chang, Yu-Wei Ting, Tsung-Hao Yeh, Kuo-Chyuan Tzeng, Kuo-Ching Huang
  • Publication number: 20230397511
    Abstract: A dielectric isolation layer having a top surface may be formed over a substrate. A heater line, a phase change material (PCM) line, and an in-process conductive barrier plate may be formed over the dielectric isolation layer. An electrode material layer may be formed over the in-process conductive barrier plate. The electrode material layer and the in-process conductive barrier plate may be patterned such that patterned portions of the in-process conductive barrier plate include a first conductive barrier plate contacting a first area of a top surface of the PCM line, and a second conductive barrier plate contacting a second area of the top surface of the PCM line, and patterned portions of the electrode material layer include a first electrode contacting the first conductive barrier plate and a second electrode contacting the second conductive barrier plate.
    Type: Application
    Filed: June 1, 2022
    Publication date: December 7, 2023
    Inventors: Harry-Hak-Lay Chuang, Chia Wen Liang, Chang-Chih Huang, Han-Yu Chen, Kuo-Chyuan Tzeng, Tsung-Hao Yeh
  • Publication number: 20230389449
    Abstract: A dielectric isolation layer having a planar top surface is formed over a substrate. A first electrode and a second electrode are formed over the planar top surface. An insulating matrix layer is formed around the first electrode and the second electrode. A phase change material (PCM) line is formed over the insulating matrix layer. A first end portion of the PCM line contacts a top surface of the first electrode and a second end portion of the PCM line contacts a top surface of the second electrode. A dielectric encapsulation layer is formed on sidewalls of the PCM line and over the PCM line and over a top surface of the insulating matrix layer. A heater line is formed prior to, or after, formation of the PCM line. The heater line underlies the PCM line or overlies the PCM line. A PCM switch device may be provided.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Inventors: Tsung-Hsueh Yang, Chang-Chih Huang, Fu-Ting Sung, Kuo-Chyuan Tzeng
  • Publication number: 20230326522
    Abstract: Various embodiments of the present application are directed towards an integrated chip including a first conductive interconnect structure overlying a substrate. A first memory stack is disposed on the first conductive interconnect structure. A second conductive interconnect structure overlies the first memory stack. The second conductive interconnect structure is spaced laterally between opposing sidewalls of the first conductive interconnect structure. A third conductive interconnect structure is disposed on the first conductive interconnect structure. A top surface of the third conductive interconnect structure is vertically above the second conductive interconnect structure.
    Type: Application
    Filed: June 9, 2023
    Publication date: October 12, 2023
    Inventors: Chang-Chih Huang, Jui-Yu Pan, Kuo-Chyuan Tzeng
  • Patent number: 11715519
    Abstract: Various embodiments of the present application are directed towards a method for forming an integrated chip. The method includes forming a dielectric structure over a substrate. A first conductive wire is formed along the dielectric structure. The first conductive wire extends laterally along a first direction. A memory stack is formed on a top surface of the first conductive wire. A second conductive wire is formed over the memory stack. The second conductive wire extends laterally along a second direction orthogonal to the first direction. An upper conductive via is formed on the top surface of the first conductive wire. An upper surface of the upper conductive via is above the second conductive wire.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: August 1, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chang-Chih Huang, Jui-Yu Pan, Kuo-Chyuan Tzeng
  • Patent number: 11676822
    Abstract: A method for fabrication of a semiconductor structure according to some embodiments of the present disclosure comprises following steps. A first mandrel is formed over a target layer over a substrate, wherein the first mandrel comprises a mandrel island connecting a first mandrel strip and a second mandrel strip. A first spacer is formed along first and second sidewalls of the mandrel island, the first mandrel strip, and the second mandrel strip. The first mandrel is then removed, and the target layer is patterned with the first spacer remains over the target layer. The first mandrel strip and the second mandrel strip are misaligned from one another.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: June 13, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wen Wang, Kuo-Chyuan Tzeng