Patents by Inventor Kuo Feng Peng

Kuo Feng Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113221
    Abstract: A fin field effect transistor (FinFET) device structure is provided. The FinFET device structure includes a plurality of fin structures above a substrate, an isolation structure over the substrate and between the fin structures, and a gate structure formed over the fin structure. The FinFET device structure includes a source/drain (S/D) structure over the fin structure, and the S/D structure is adjacent to the gate structure. The FinFET device structure also includes a metal silicide layer over the S/D structure, and the metal silicide layer is in contact with the isolation structure.
    Type: Application
    Filed: November 28, 2023
    Publication date: April 4, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Hsiung TSAI, Shahaji B. MORE, Cheng-Yi PENG, Yu-Ming LIN, Kuo-Feng YU, Ziwei FANG
  • Publication number: 20240072155
    Abstract: A method includes forming a transistor, which includes forming a dummy gate stack over a semiconductor region, and forming an Inter-Layer Dielectric (ILD). The dummy gate stack is in the ILD, and the ILD covers a source/drain region in the semiconductor region. The method further includes removing the dummy gate stack to form a trench in the first ILD, forming a low-k gate spacer in the trench, forming a replacement gate dielectric extending into the trench, forming a metal layer to fill the trench, and performing a planarization to remove excess portions of the replacement gate dielectric and the metal layer to form a gate dielectric and a metal gate, respectively. A source region and a drain region are then formed on opposite sides of the metal gate.
    Type: Application
    Filed: November 8, 2023
    Publication date: February 29, 2024
    Inventors: Kuo-Hua Pan, Je-Wei Hsu, Hua Feng Chen, Jyun-Ming Lin, Chen-Huang Peng, Min-Yann Hsieh, Java Wu
  • Publication number: 20060090334
    Abstract: Processes for packing -memory cards includes a step of preparing a base circuit board; a step of disposing passing members on the base circuit; a step of installing chips on each of the passive members; a step of using a single mold to glue or mold the chips on the passive members so as to form a plurality of circuit areas; a step of cutting the circuit areas from the base circuit board to be circuit pieces, and a step of installing each of the circuit pieces into casings respectively to obtain memory cards. The processes require only a single mold so as to reduce the expense of the mold and is suitable for mass production.
    Type: Application
    Filed: November 1, 2004
    Publication date: May 4, 2006
    Inventors: Chi Chen, Chen Chuan, Kuo-Feng Peng, Chia Chang
  • Publication number: 20060082986
    Abstract: A memory card includes a base plate on which IC chips are connected and a housing is mounted to the base plate. The housing has at least one recess defined in an underside of the housing and sealed by a top which is in flush with the outside of the housing. At leas tone of the IC chips is accommodated in the recess.
    Type: Application
    Filed: October 14, 2004
    Publication date: April 20, 2006
    Inventors: Chi Chen, Chen Chuan, Kuo-Feng Peng, Chia Chang
  • Publication number: 20060083044
    Abstract: The MMC memory card with TSOP package includes a circuit board with a plurality of passive elements and ICs installed thereon and a plastic housing is covered over and enclosing the circuit board to form a memory card structure. At least one flash memory of the ICs is used with a TSOP package and the housing has a space to position the TSOP type flash memory such that said TSOP type flash memory is assembled with the housing and the total thickness of the assembly meets the requirement of the standard specification.
    Type: Application
    Filed: October 14, 2004
    Publication date: April 20, 2006
    Inventors: Chi Chen, Wen Chen, Kuo-Feng Peng, Chia Chang
  • Publication number: 20050093119
    Abstract: A memory card includes a base plate on which IC chips are connected and a case is mounted to the base plate. At least one window is defined through the case so that at least one of the IC chips is accommodated in the window. A seal plate is attached on the case and seals the at least one window.
    Type: Application
    Filed: October 31, 2003
    Publication date: May 5, 2005
    Inventors: Wen Chen, Kuo-Feng Peng, Chia Chang, Chi Chen
  • Patent number: 6646316
    Abstract: A package structure of an image sensor is characterized in that an image sensing chip is directly packaged on a flexible circuit board by way of flip chip bonding. The package structure of an image sensor includes an image sensing chip, a flexible circuit board, and a transparent layer. A plurality of electrical circuits are formed on the image sensing chip. Each of the electrical circuits is formed with bonding pads. A flexible circuit board has an upper surface and a lower surface. Signal input terminals are formed on the lower surface and at positions corresponding to each of the bonding pads of the image sensing chip, respectively, for electrically connecting to the corresponding bonding pads of the image sensing chip. The signal input terminals are electrically connected to signal output terminals, respectively, for electrically connecting to the printed circuit board. The transparent layer is used for covering the upper surface of the flexible circuit board.
    Type: Grant
    Filed: January 24, 2001
    Date of Patent: November 11, 2003
    Assignee: Kingpak Technology, Inc.
    Inventors: Jichen Wu, Hsiu Wen Tu, Kuo Feng Peng, C. H. Chen, Wen Chuan Chen
  • Patent number: 6489572
    Abstract: A substrate structure for an integrated circuit package. The substrate is electrically connected to a circuit board and an integrated circuit. The substrate includes a plurality of metal sheets and glue. The metal sheets are arranged opposite to each other. Each of the metal sheets includes a first surface and a second surface. The glue is used for sealing the plurality of metal sheet to form the substrate. The first surfaces and second surfaces of the metal sheets are exposed to the outside of the glue so as to form a plurality of signal input terminals for electrically connecting to the integrated circuit and a plurality of signal output terminals for electrically connecting to the circuit board. Thus, the signal output terminals of the metal sheets can be electrically connected to the circuit board smoothly. Furthermore, the signal transmission distance between the integrated circuit and the circuit board can be shortened so that better signal transmission effect can be obtained.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: December 3, 2002
    Assignee: Kingpak Technology Inc.
    Inventors: Mon Nan Ho, Chih-Hong Chen, Yen Cheng Huang, Li Huan Chen, Kuo Feng Peng, Jichen Wu, Allis Chen, Wen Chuan Chen
  • Patent number: 6441496
    Abstract: The structure of stacked integrated circuits includes a substrate, a lower integrated circuit, a plurality of wirings, an adhesive layer, and an upper integrated circuit. The substrate has a first surface formed with signal input terminals, and a second surface formed with signal output terminals. The lower integrated circuit has a first surface and a second surface. The first surface is adhered to the first surface of the substrate while the second surface is formed with a plurality of bonding pads. The wirings have first ends and second ends. The first ends are electrically connected to the bonding pads of the lower integrated circuit while the second ends are electrically connected to the signal input terminals of the substrate. The adhesive layer is coated on the second surface of the lower integrated circuit and includes adhesive agent and filling elements.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: August 27, 2002
    Inventors: Wen Chuan Chen, Kuo Feng Peng, Jichen Wu, Chia Jung Chang
  • Publication number: 20020096360
    Abstract: A substrate structure for an integrated circuit package. The substrate is electrically connected to a circuit board and an integrated circuit. The substrate includes a plurality of metal sheets and glue. The metal sheets are arranged opposite to each other. Each of the metal sheets includes a first surface and a second surface. The glue is used for sealing the plurality of metal sheet to form the substrate. The first surfaces and second surfaces of the metal sheets are exposed to the outside of the glue so as to form a plurality of signal input terminals for electrically connecting to the integrated circuit and a plurality of signal output terminals for electrically connecting to the circuit board. Thus, the signal output terminals of the metal sheets can be electrically connected to the circuit board smoothly. Furthermore, the signal transmission distance between the integrated circuit and the circuit board can be shortened so that better signal transmission effect can be obtained.
    Type: Application
    Filed: January 23, 2001
    Publication date: July 25, 2002
    Inventors: Mon Nan Ho, C. H. Chen, Yen Cheng Huang, Li Huan Chen, Kuo Feng Peng, Jichen Wu, Allis Chen, Wen Chuan Chen
  • Publication number: 20020096766
    Abstract: A package structure for an integrated circuit includes a substrate, an integrated circuit, an adhesive layer, a plurality of wirings, and a glue layer. The substrate has a first surface and a second surface. The first surface is formed with a plurality of signal input terminals. The second surface is formed with a plurality of signal output terminals for electrically connecting to the circuit board. The integrated circuit has a lower surface and an upper surface. Recesses are formed at two sides of the lower surface, and a plurality of bonding pads are formed on the upper surface. The adhesive layer is used for adhering the lower surface of the integrated circuit to the first surface of the substrate. The wirings are electrically connecting to the bonding pads of the integrated circuit and to the signal input terminals of the substrate. The glue layer is used for sealing the plurality of wirings and the integrated circuits.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 25, 2002
    Inventors: Wen Chuan Chen, Kuo Feng Peng, C. H. Chou, Allis Chen, Nai Hua Yeh, Yen Cheng Huang, C. F. Wang, Chen Pin Peng, Wen Tsan Lee, Jichen Wu
  • Publication number: 20020096761
    Abstract: A structure of stacked integrated circuits arranged on a circuit board includes a substrate, a lower integrated circuit, a plurality of wirings, a passivation layer, and an upper integrated circuit. The substrate has a first surface formed with signal input terminals, and a second surface formed with signal output terminals for electrically connecting to the circuit board. The lower integrated circuit has a first surface and a second surface. The first surface of the lower integrated circuit is adhered onto the first surface of the substrate. The second surface of the lower integrated circuit is formed with a plurality of bonding pads. The wirings each includes a first end and a second end opposite to the first end. The first ends of the wirings are electrically connected to the bonding pads of the lower integrated circuit, and the second ends of the wirings are electrically connected to the signal input terminals of the substrate, respectively.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 25, 2002
    Inventors: Wen Chuan Chen, Kuo Feng Peng, C. H. Chou, Allis Chen, Nai Hua Yeh, Yen Cheng Huang, Fu Yung Huang, Chief Lin, C. S. Cheng
  • Publication number: 20020096751
    Abstract: An integrated circuit structure having an adhesive agent for adhering to a substrate includes a first surface and a second surface opposite to the first surface. The first surface is formed with a plurality of bonding pads for electrically connecting to the substrate and transmitting signals from the integrated circuit to the substrate. An adhesive agent, which is non-adhesive at the room temperature, is applied onto the second surface. The adhesive agent becomes adhesive under pressing/heating so as to adhere onto the substrate. According to the structure, the problems caused by the overflowed glue can be avoided, the manufacturing processes can be facilitated, and the yield can be improved.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 25, 2002
    Inventors: Wen Chuan Chen, Kuo Feng Peng, C. H. Chou, Allis Chen, Nai Hua Yeh, Wu Hsiang Lee, Meng Ru Tsai, Hsiu Wen Tu, Jichen Wu
  • Publication number: 20020096731
    Abstract: A package structure of an image sensor is characterized in that an image sensing chip is directly packaged on a flexible circuit board by way of flip chip bonding. The package structure of an image sensor includes an image sensing chip, a flexible circuit board, and a transparent layer. A plurality of electrical circuits are formed on the image sensing chip. Each of the electrical circuits is formed with bonding pads. A flexible circuit board has an upper surface and a lower surface. Signal input terminals are formed on the lower surface and at positions corresponding to each of the bonding pads of the image sensing chip, respectively, for electrically connecting to the corresponding bonding pads of the image sensing chip. The signal input terminals are electrically connected to signal output terminals, respectively, for electrically connecting to the printed circuit board. The transparent layer is used for covering the upper surface of the flexible circuit board.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 25, 2002
    Inventors: Jichen Wu, Hsiu Wen Tu, Kuo Feng Peng, C.H. Chen, Wen Chuan Chen
  • Publication number: 20020096780
    Abstract: The structure of stacked integrated circuits includes a substrate, a lower integrated circuit, a plurality of wirings, an adhesive layer, and an upper integrated circuit. The substrate has a first surface formed with signal input terminals, and a second surface formed with signal output terminals. The lower integrated circuit has a first surface and a second surface. The first surface is adhered to the first surface of the substrate while the second surface is formed with a plurality of bonding pads. The wirings have first ends and second ends. The first ends are electrically connected to the bonding pads of the lower integrated circuit while the second ends are electrically connected to the signal input terminals of the substrate. The adhesive layer is coated on the second surface of the lower integrated circuit and includes adhesive agent and filling elements.
    Type: Application
    Filed: January 23, 2001
    Publication date: July 25, 2002
    Inventors: Wen Chuan Chen, Kuo Feng Peng, Jichen Wu, Chia Jung Chang
  • Publication number: 20020096782
    Abstract: A package structure of an image sensor for electrically connecting to a printed circuit board includes a transparent layer and an image sensing chip. A plurality of signal input terminals and signal output terminals are formed on the transparent layer. The signal output terminals are used for electrically connecting the transparent layer to the printed circuit board. A plurality of electrical circuits are formed on the image sensing chip. Each of the electrical circuits is formed with bonding pads and is electrically connected to the transparent layer by way of flip chip bonding. The bonding pads are electrically connected to the signal input terminals of the transparent layer. The image sensing chip receives image signals via the transparent layer, converts the image signals into electrical signals, and transmits the electrical signals from the signal output terminals of the transparent layer to the printed circuit board.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 25, 2002
    Inventors: Jichen Wu, Hsiu Wen Tu, Kuo Feng Peng, C.H. Chen, Wen Chuan Chen
  • Publication number: 20020096762
    Abstract: A structure of stacked integrated circuits for mounting on a circuit board includes a substrate, a lower integrated circuit, a plurality of wirings, a plurality of metallic balls, and an upper integrated circuit. The substrate has a first surface formed with signal input terminals and a second surface formed with signal output terminals for electrically connecting to the circuit board. The lower integrated circuit has a first surface adhered to the first surface of the substrate and a second surface formed with a plurality of bonding pads. Each of the wirings has a first end and a second end away from the first end. The first ends are electrically connected to the bonding pads of the lower integrated circuit. The second ends are electrically connected to the signal input terminals on the first surface of the substrate. The plurality of metallic balls are formed on the second surface of the lower integrated circuit.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 25, 2002
    Inventors: Wen Chuan Chen, Kuo Feng Peng, C. H. Chou, Allis Chen, Nai Hua Yeh, Yen Cheng Huang, Fu Yung Huang, Chief Lin, C. S. Cheng
  • Publication number: 20020096754
    Abstract: A stacked structure of integrated circuits for electrically connecting to a circuit board includes a substrate, a lower integrated circuit, a plurality of wirings, and an upper integrated circuit. The lower integrated circuit has a lower surface and an upper surface. The lower surface is adhered onto the first surface of the substrate. A plurality of bonding pads are formed on the upper surface. The wirings each has a first end and a second end. The first ends of the wirings are electrically connected to the bonding pads of the lower integrated circuit. The second ends of the wirings are electrically connected to the signal input terminals of the substrate. The upper integrated circuit has a lower surface and an upper surface. Two recesses are formed at two sides of the lower surface. The upper integrated circuit is adhered to the upper surface of the lower integrated circuit so as to stack above the lower integrated circuit.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 25, 2002
    Inventors: Wen Chuan Chen, Kuo Feng Peng, C. H. Chou, Allis Chen, Nai Hua Yeh, Yen Cheng Huang, C. F. Wang, Chen Pin Peng, Wen Tsan Lee, Jichen Wu
  • Publication number: 20020060287
    Abstract: A structure of a photosensor for receiving optical signals and converting the optical signals into electrical signals to be transmitted to a circuit board, the structure of the photosensor includes a substrate, a photosensitive chip, and a transparent layer. The substrate has a first surface formed with signal input terminals, and a second surface opposite to the first surface and formed with signal output terminals for electrically connecting the substrate to the circuit board. The photosensitive chip is mounted on the first surface of the substrate and electrically connecting to the substrate. The transparent layer is adhered onto the first surface of the substrate. A cavity is formed at a central portion of the transparent layer. The photosensitive chip on the substrate is located within the cavity of the transparent layer, and the photosensitive chip is capable of receiving the optical signals via the transparent layer.
    Type: Application
    Filed: January 24, 2001
    Publication date: May 23, 2002
    Inventors: Mon Nan Ho, Hsiu Wen Tu, Kuo Feng Peng, Li Huan Chen, Joe Liu, Jichen Wu, Wen Chuan Chen, Yung Sheng Chiu
  • Publication number: 20020043709
    Abstract: A stackable integrated circuit for electrically connecting to a circuit board and for a second integrated circuit body to be stacked on. The stackable integrated circuit includes an integrated circuit body, a plurality of first contacts, a projecting layer, and a plurality of second contacts. The integrated circuit body has a first surface and a second surface opposite to the first surface. The first contacts are formed on the first surface of the integrated circuit body for electrically connecting the integrated circuit body to the circuit board. The projecting layer is arranged on the second surface of the integrated circuit body. The second contacts are formed on the projecting layer for electrically connecting the integrated circuit body to a second integrated circuit body.
    Type: Application
    Filed: January 23, 2001
    Publication date: April 18, 2002
    Inventors: Nai Hua Yeh, Mon Nan Ho, Hsiu Wen Tu, Yung Sheng Chiu, Kuo Feng Peng, Jichen Wu, Kuang Yu Fan, Wen Chuan Chen