Patents by Inventor Kuo-Hao Lee
Kuo-Hao Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250246578Abstract: Alignment of devices formed on substrates that are to be bonded may be achieved through the use of scribe lines between the devices, where the scribe lines progressively increase or decrease in size from a center to an edge of one or more of the substrates to compensate for differences in the thermal expansion rates of the substrates. The devices on the substrates are brought into alignment as the substrates are heated during a bonding operation due to the progressively increased or decreased sizes of the scribe lines. The scribe lines may be arranged in a single direction in a substrate to compensate for thermal expansion along a single axis of the substrate or may be arranged in a plurality of directions to compensate for actinomorphic thermal expansion.Type: ApplicationFiled: March 19, 2025Publication date: July 31, 2025Inventors: Hsi-Cheng HSU, Jui-Chun WENG, Ching-Hsiang HU, Ji-Hong CHIANG, Kuo-Hao LEE, Chia-Yu LIN, Chia-Chun HUNG, Yen-Chieh TU, Chien-Tai SU, Hsin-Yu CHEN
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Publication number: 20250226342Abstract: In some embodiments, a method for forming a semiconductor structure is provided. The method includes forming a first semiconductor layer including a stand-off feature. A bond pad layer is formed over the first semiconductor layer and the stand-off feature. The bond pad layer is patterned to form a first bond pad over the stand-off feature and a second pad over a portion of the first semiconductor layer. An annealing process is performed to increase a surface roughness of the first bond pad and the second pad. The first semiconductor layer is patterned to form a micro-electromechanical systems (MEMS) structure including a movable element. A device die is bonded to the stand-off feature. The second pad is over the movable element.Type: ApplicationFiled: January 9, 2024Publication date: July 10, 2025Inventors: Hsi-Cheng HSU, Jui-Chun WENG, Ji-Hong CHIANG, Kuo-Hao LEE
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Patent number: 12283568Abstract: Alignment of devices formed on substrates that are to be bonded may be achieved through the use of scribe lines between the devices, where the scribe lines progressively increase or decrease in size from a center to an edge of one or more of the substrates to compensate for differences in the thermal expansion rates of the substrates. The devices on the substrates are brought into alignment as the substrates are heated during a bonding operation due to the progressively increased or decreased sizes of the scribe lines. The scribe lines may be arranged in a single direction in a substrate to compensate for thermal expansion along a single axis of the substrate or may be arranged in a plurality of directions to compensate for actinomorphic thermal expansion.Type: GrantFiled: July 5, 2023Date of Patent: April 22, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsi-Cheng Hsu, Jui-Chun Weng, Ching-Hsiang Hu, Ji-Hong Chiang, Kuo-Hao Lee, Chia-Yu Lin, Chia-Chun Hung, Yen-Chieh Tu, Chien-Tai Su, Hsin-Yu Chen
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Publication number: 20250123450Abstract: Some embodiments relate to an integrated circuit (IC) device that includes a first substrate including an optical lens at a frontside surface of the first substrate, an electrical IC structure disposed proximate a backside surface of the first substrate, and a photonic IC structure disposed proximate a backside surface of the electrical IC structure. The photonic IC structure includes a second substrate providing a backside surface of the photonic IC structure; a photodetector, a grating coupler, and an inverse grating coupler disposed over a frontside surface of the second substrate; and a reflector disposed at a frontside surface of the photonic IC structure. The grating coupler and the inverse grating coupler are configured to direct light from the optical lens and the backside surface of the second substrate, respectively, to the photodetector. The reflector is configured to direct light from the inverse grating coupler back to the inverse grating coupler.Type: ApplicationFiled: October 17, 2023Publication date: April 17, 2025Inventors: Xin-Hua Huang, Kuo-Hao Lee, Jung-Kuo Tu, Kejun Xia, Tse-En Chang
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Patent number: 12242181Abstract: A portion of a buffer layer on a backside of a substrate of a photomask assembly may be removed prior to formation of one or more capping layers on the backside of the substrate. The one or more capping layers may be formed directly on the backside of the substrate where the buffer layer is removed from the substrate, and a hard mask layer may be formed directly on the one or more capping layers. The one or more capping layers may include a low-stress material to promote adhesion between the one or more capping layers and the substrate, and to reduce and/or minimize peeling and delamination of the capping layer(s) from the substrate. This may reduce the likelihood of damage to the pellicle layer and/or other components of the photomask assembly and/or may increase the yield of an exposure process in which the photomask assembly is used.Type: GrantFiled: July 31, 2023Date of Patent: March 4, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Hao Lee, Hsi-Cheng Hsu, Jui-Chun Weng, Han-Zong Pan, Hsin-Yu Chen, You-Cheng Jhang
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Publication number: 20240402441Abstract: A photonic package includes an optical die and an electronic die. The optical die has a first side and a second side opposite to the first side. The optical die includes a first grating coupler, a second grating coupler separated from the first grating coupler and an interconnect structure disposed over the first side. The first grating coupler includes a plurality of first segments disposed over the first side, and the second grating coupler includes a plurality of second segments disposed over the first side. The first segments and the second segments include a same material. The interconnect structure is disposed between the electronic die and the optical die. The optical die and the electronic die are electrically connected to each other through the interconnect structure. The first segments are in contact with the interconnect structure, and the second segments are separated from the interconnect structure.Type: ApplicationFiled: May 30, 2023Publication date: December 5, 2024Inventors: Kuo-Hao LEE, Xin-Hua HUANG, Jung-Kuo TU, Kejun XIA, Tse-En CHANG
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Patent number: 12130551Abstract: A photomask assembly may be formed such that stress relief trenches are formed in a pellicle frame of the photomask assembly. The stress relief trenches may reduce or prevent damage to a pellicle that may otherwise result from deformation of the pellicle. The stress relief trenches may be formed in areas of the pellicle frame to allow the pellicle frame to deform with the pellicle, thereby reducing the amount damage to the pellicle caused by the pellicle frame.Type: GrantFiled: June 15, 2023Date of Patent: October 29, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Hao Lee, You-Cheng Jhang, Han-Zong Pan, Jui-Chun Weng, Chiu-Hua Chung, Sheng-Yuan Lin, Hsin-Yu Chen
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Patent number: 12054382Abstract: A micro-electromechanical-system (MEMS) device may be formed to include an anti-stiction polysilicon layer on one or more moveable MEMS structures of a device wafer of the MEMS device to reduce, minimize, and/or eliminate stiction between the moveable MEMS structures and other components or structures of the MEMS device. The anti-stiction polysilicon layer may be formed such that a surface roughness of the anti-stiction polysilicon layer is greater than the surface roughness of a bonding polysilicon layer on the surfaces of the device wafer that are to be bonded to a circuitry wafer of the MEMS device. The higher surface roughness of the anti-stiction polysilicon layer may reduce the surface area of the bottom of the moveable MEMS structures, which may reduce the likelihood that the one or more moveable MEMS structures will become stuck to the other components or structures.Type: GrantFiled: April 28, 2023Date of Patent: August 6, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsi-Cheng Hsu, Kuo-Hao Lee, Jui-Chun Weng, Ching-Hsiang Hu, Ji-Hong Chiang, Lavanya Sanagavarapu, Chia-Yu Lin, Chia-Chun Hung, Jia-Syuan Li, Yu-Pei Chiang
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Publication number: 20230384664Abstract: A portion of a buffer layer on a backside of a substrate of a photomask assembly may be removed prior to formation of one or more capping layers on the backside of the substrate. The one or more capping layers may be formed directly on the backside of the substrate where the buffer layer is removed from the substrate, and a hard mask layer may be formed directly on the one or more capping layers. The one or more capping layers may include a low-stress material to promote adhesion between the one or more capping layers and the substrate, and to reduce and/or minimize peeling and delamination of the capping layer(s) from the substrate. This may reduce the likelihood of damage to the pellicle layer and/or other components of the photomask assembly and/or may increase the yield of an exposure process in which the photomask assembly is used.Type: ApplicationFiled: July 31, 2023Publication date: November 30, 2023Inventors: Kuo-Hao LEE, Hsi-Cheng HSU, Jui-Chun WENG, Han-Zong PAN, Hsin-Yu CHEN, You-Cheng JHANG
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Publication number: 20230352445Abstract: Alignment of devices formed on substrates that are to be bonded may be achieved through the use of scribe lines between the devices, where the scribe lines progressively increase or decrease in size from a center to an edge of one or more of the substrates to compensate for differences in the thermal expansion rates of the substrates. The devices on the substrates are brought into alignment as the substrates are heated during a bonding operation due to the progressively increased or decreased sizes of the scribe lines. The scribe lines may be arranged in a single direction in a substrate to compensate for thermal expansion along a single axis of the substrate or may be arranged in a plurality of directions to compensate for actinomorphic thermal expansion.Type: ApplicationFiled: July 5, 2023Publication date: November 2, 2023Inventors: Hsi-Cheng HSU, Jui-Chun WENG, Ching-Hsiang HU, Ji-Hong CHIANG, Kuo-Hao LEE, Chia-Yu LIN, Chia-Chun HUNG, Yen-Chieh TU, Chien-Tai SU, Hsin-Yu CHEN
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Patent number: 11789360Abstract: A portion of a buffer layer on a backside of a substrate of a photomask assembly may be removed prior to formation of one or more capping layers on the backside of the substrate. The one or more capping layers may be formed directly on the backside of the substrate where the buffer layer is removed from the substrate, and a hard mask layer may be formed directly on the one or more capping layers. The one or more capping layers may include a low-stress material to promote adhesion between the one or more capping layers and the substrate, and to reduce and/or minimize peeling and delamination of the capping layer(s) from the substrate. This may reduce the likelihood of damage to the pellicle layer and/or other components of the photomask assembly and/or may increase the yield of an exposure process in which the photomask assembly is used.Type: GrantFiled: July 18, 2022Date of Patent: October 17, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Hao Lee, Hsi-Cheng Hsu, Jui-Chun Weng, Han-Zong Pan, Hsin-Yu Chen, You-Cheng Jhang
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Publication number: 20230324787Abstract: A photomask assembly may be formed such that stress relief trenches are formed in a pellicle frame of the photomask assembly. The stress relief trenches may reduce or prevent damage to a pellicle that may otherwise result from deformation of the pellicle. The stress relief trenches may be formed in areas of the pellicle frame to allow the pellicle frame to deform with the pellicle, thereby reducing the amount damage to the pellicle caused by the pellicle frame.Type: ApplicationFiled: June 15, 2023Publication date: October 12, 2023Inventors: Kuo-Hao LEE, You-Cheng JHANG, Han-Zong PAN, Jui-Chun WENG, Chiu-Hua CHUNG, Sheng-Yuan LIN, Hsin-Yu CHEN
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Patent number: 11742320Abstract: Alignment of devices formed on substrates that are to be bonded may be achieved through the use of scribe lines between the devices, where the scribe lines progressively increase or decrease in size from a center to an edge of one or more of the substrates to compensate for differences in the thermal expansion rates of the substrates. The devices on the substrates are brought into alignment as the substrates are heated during a bonding operation due to the progressively increased or decreased sizes of the scribe lines. The scribe lines may be arranged in a single direction in a substrate to compensate for thermal expansion along a single axis of the substrate or may be arranged in a plurality of directions to compensate for actinomorphic thermal expansion.Type: GrantFiled: March 11, 2021Date of Patent: August 29, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsi-Cheng Hsu, Jui-Chun Weng, Ching-Hsiang Hu, Ji-Hong Chiang, Kuo-Hao Lee, Chia-Yu Lin, Chia-Chun Hung, Yen-Chieh Tu, Chien-Tai Su, Hsin-Yu Chen
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Publication number: 20230264945Abstract: A micro-electromechanical-system (MEMS) device may be formed to include an anti-stiction polysilicon layer on one or more moveable MEMS structures of a device wafer of the MEMS device to reduce, minimize, and/or eliminate stiction between the moveable MEMS structures and other components or structures of the MEMS device. The anti-stiction polysilicon layer may be formed such that a surface roughness of the anti-stiction polysilicon layer is greater than the surface roughness of a bonding polysilicon layer on the surfaces of the device wafer that are to be bonded to a circuitry wafer of the MEMS device. The higher surface roughness of the anti-stiction polysilicon layer may reduce the surface area of the bottom of the moveable MEMS structures, which may reduce the likelihood that the one or more moveable MEMS structures will become stuck to the other components or structures.Type: ApplicationFiled: April 28, 2023Publication date: August 24, 2023Inventors: Hsi-Cheng HSU, Kuo-Hao LEE, Jui-Chun WENG, Ching-Hsiang HU, Ji-Hong CHIANG, Lavanya SANAGAVARAPU, Chia-Yu LIN, Chia-Chun HUNG, Jia-Syuan LI, Yu-Pei CHIANG
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Patent number: 11726401Abstract: A photomask assembly may be formed such that stress relief trenches are formed in a pellicle frame of the photomask assembly. The stress relief trenches may reduce or prevent damage to a pellicle that may otherwise result from deformation of the pellicle. The stress relief trenches may be formed in areas of the pellicle frame to allow the pellicle frame to deform with the pellicle, thereby reducing the amount damage to the pellicle caused by the pellicle frame.Type: GrantFiled: July 27, 2022Date of Patent: August 15, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Hao Lee, You-Cheng Jhang, Han-Zong Pan, Jui-Chun Weng, Chiu-Hua Chung, Sheng-Yuan Lin, Hsin-Yu Chen
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Patent number: 11655138Abstract: A micro-electromechanical-system (MEMS) device may be formed to include an anti-stiction polysilicon layer on one or more moveable MEMS structures of a device wafer of the MEMS device to reduce, minimize, and/or eliminate stiction between the moveable MEMS structures and other components or structures of the MEMS device. The anti-stiction polysilicon layer may be formed such that a surface roughness of the anti-stiction polysilicon layer is greater than the surface roughness of a bonding polysilicon layer on the surfaces of the device wafer that are to be bonded to a circuitry wafer of the MEMS device. The higher surface roughness of the anti-stiction polysilicon layer may reduce the surface area of the bottom of the moveable MEMS structures, which may reduce the likelihood that the one or more moveable MEMS structures will become stuck to the other components or structures.Type: GrantFiled: May 4, 2021Date of Patent: May 23, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsi-Cheng Hsu, Kuo-Hao Lee, Jui-Chun Weng, Ching-Hsiang Hu, Ji-Hong Chiang, Lavanya Sanagavarapu, Chia-Yu Lin, Chia-Chun Hung, Jia-Syuan Li, Yu-Pei Chiang
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Publication number: 20220365424Abstract: A photomask assembly may be formed such that stress relief trenches are formed in a pellicle frame of the photomask assembly. The stress relief trenches may reduce or prevent damage to a pellicle that may otherwise result from deformation of the pellicle. The stress relief trenches may be formed in areas of the pellicle frame to allow the pellicle frame to deform with the pellicle, thereby reducing the amount damage to the pellicle caused by the pellicle frame.Type: ApplicationFiled: July 27, 2022Publication date: November 17, 2022Inventors: Kuo-Hao LEE, You-Cheng JHANG, Han-Zong PAN, Jui-Chun WENG, Chiu-Hua CHUNG, Sheng-Yuan LIN, Hsin-Yu CHEN
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Publication number: 20220365423Abstract: A portion of a buffer layer on a backside of a substrate of a photomask assembly may be removed prior to formation of one or more capping layers on the backside of the substrate. The one or more capping layers may be formed directly on the backside of the substrate where the buffer layer is removed from the substrate, and a hard mask layer may be formed directly on the one or more capping layers. The one or more capping layers may include a low-stress material to promote adhesion between the one or more capping layers and the substrate, and to reduce and/or minimize peeling and delamination of the capping layer(s) from the substrate. This may reduce the likelihood of damage to the pellicle layer and/or other components of the photomask assembly and/or may increase the yield of an exposure process in which the photomask assembly is used.Type: ApplicationFiled: July 18, 2022Publication date: November 17, 2022Inventors: Kuo-Hao LEE, Hsi-Cheng HSU, Jui-Chun WENG, Han-Zong PAN, Hsin-Yu CHEN, You-Cheng JHANG
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Publication number: 20220293557Abstract: Alignment of devices formed on substrates that are to be bonded may be achieved through the use of scribe lines between the devices, where the scribe lines progressively increase or decrease in size from a center to an edge of one or more of the substrates to compensate for differences in the thermal expansion rates of the substrates. The devices on the substrates are brought into alignment as the substrates are heated during a bonding operation due to the progressively increased or decreased sizes of the scribe lines. The scribe lines may be arranged in a single direction in a substrate to compensate for thermal expansion along a single axis of the substrate or may be arranged in a plurality of directions to compensate for actinomorphic thermal expansion.Type: ApplicationFiled: March 11, 2021Publication date: September 15, 2022Inventors: Hsi-Cheng HSU, Jui-Chun WENG, Ching-Hsiang HU, Ji-Hong CHIANG, Kuo-Hao LEE, Chia-Yu LIN, Chia-Chun HUNG, Yen-Chieh TU, Chien-Tai SU, Hsin-Yu CHEN
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Patent number: 11415878Abstract: A photomask assembly may be formed such that stress relief trenches are formed in a pellicle frame of the photomask assembly. The stress relief trenches may reduce or prevent damage to a pellicle that may otherwise result from deformation of the pellicle. The stress relief trenches may be formed in areas of the pellicle frame to allow the pellicle frame to deform with the pellicle, thereby reducing the amount damage to the pellicle caused by the pellicle frame.Type: GrantFiled: September 15, 2020Date of Patent: August 16, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Hao Lee, You-Cheng Jhang, Han-Zong Pan, Jui-Chun Weng, Chiu-Hua Chung, Sheng-Yuan Lin, Hsin-Yu Chen