Abstract: The present invention provides a non-volatile memory cell, comprising a tunnel dielectric layer disposed on the substrate, a barrier dielectric layer disposed over the tunnel dielectric layer, a graded charge trapping layer disposed between the tunnel dielectric layer and the barrier dielectric layer, a gate conductive layer disposed on the barrier dielectric layer and a source/drain region disposed in the substrate. The compositional ratio of the graded trapping layer gradually varies in different positions of the graded trapping layer.