Patents by Inventor Kuo-Hsiung Huang
Kuo-Hsiung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11291910Abstract: A mobile electronic apparatus including an audio receiver and a controller is provided. The audio receiver receives a reference signal via a first hole and a second hole on a housing of the mobile electronic apparatus. The controller detects a touch event on the second hole according to the received reference signal.Type: GrantFiled: February 14, 2020Date of Patent: April 5, 2022Assignee: MEDIATEK INC.Inventors: Kuo-Hsiung Huang, Wen-Kai Chiu, Ya-Ting Tsai, Chia-Hsin Yang, Kun-Tien Kuo
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Publication number: 20210252385Abstract: A mobile electronic apparatus including an audio receiver and a controller is provided. The audio receiver receives a reference signal via a first hole and a second hole on a housing of the mobile electronic apparatus. The controller detects a touch event on the second hole according to the received reference signal.Type: ApplicationFiled: February 14, 2020Publication date: August 19, 2021Inventors: Kuo-Hsiung HUANG, Wen-Kai CHIU, Ya-Ting TSAI, Chia-Hsin YANG, Kun-Tien KUO
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Publication number: 20160105628Abstract: A method for controlling an electronic device with aid of user input back channel (UIBC), an associated apparatus, and an associated computer program product are provided, where the method includes the steps of: outputting video information of a UIBC user interface (UI) to an external display device, to display the UIBC UI on a display area of the external display device, wherein the external display device is positioned outside the electronic device; and receiving from a user of the electronic device through the external display device a user input applied to the UIBC UI, and controlling the electronic device to operate in response to the user input applied to the UIBC UI.Type: ApplicationFiled: May 14, 2015Publication date: April 14, 2016Inventor: Kuo-Hsiung Huang
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Patent number: 8981501Abstract: A method of forming a semiconductor device is disclosed. Provided is a substrate having at least one MOS device, at least one metal interconnection and at least one MOS device formed on a first surface thereof. A first anisotropic etching process is performed to remove a portion of the substrate from a second surface of the substrate and thereby form a plurality of vias in the substrate, wherein the second surface is opposite to the first surface. A second anisotropic etching process is performed to remove another portion of the substrate from the second surface of the substrate and thereby form a cavity in the substrate, wherein the remaining vias are located below the cavity. An isotropic etching process is performed to the cavity and the remaining vias.Type: GrantFiled: April 25, 2013Date of Patent: March 17, 2015Assignee: United Microelectronics Corp.Inventors: Meng-Jia Lin, Chang-Sheng Hsu, Kuo-Hsiung Huang, Wei-Hua Fang, Shou-Wei Hsieh, Te-Yuan Wu, Chia-Huei Lin
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Publication number: 20140319693Abstract: A method of forming a semiconductor device is disclosed. Provided is a substrate having at least one MOS device, at least one metal interconnection and at least one MOS device formed on a first surface thereof. A first anisotropic etching process is performed to remove a portion of the substrate from a second surface of the substrate and thereby form a plurality of vias in the substrate, wherein the second surface is opposite to the first surface. A second anisotropic etching process is performed to remove another portion of the substrate from the second surface of the substrate and thereby form a cavity in the substrate, wherein the remaining vias are located below the cavity. An isotropic etching process is performed to the cavity and the remaining vias.Type: ApplicationFiled: April 25, 2013Publication date: October 30, 2014Applicant: United Microelectronics Corp.Inventors: Meng-Jia Lin, Chang-Sheng Hsu, Kuo-Hsiung Huang, Wei-Hua Fang, Shou-Wei Hsieh, Te-Yuan Wu, Chia-Huei Lin
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Patent number: 8841755Abstract: The present invention relates to a through silicon via (TSV). The TSV is disposed in a substrate including a via opening penetrating through a first surface and a second surface of the substrate. The TSV includes an insulation layer, a barrier layer, a buffer layer and a conductive electrode. The insulation layer is disposed on a surface of the via opening. The barrier layer is disposed on a surface of the insulation layer. The buffer layer is disposed on a surface of the barrier layer. The conductive electrode is disposed on a surface of the buffer layer and a remainder of the via opening is completely filled with the conductive electrode. A portion of the buffer layer further covers a surface of the conductive electrode at a side of the second surface and said portion is level with the second surface.Type: GrantFiled: July 22, 2013Date of Patent: September 23, 2014Assignee: United Microelectronics Corp.Inventors: Kuo-Hsiung Huang, Chun-Mao Chiou, Hsin-Yu Chen, Yu-Han Tsai, Ching-Li Yang, Home-Been Cheng
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Patent number: 8754504Abstract: A thinning method of a wafer is provided. The method includes the following steps. First, a wafer having a first surface, a second surface, and a side surface is provided, and the side surface is connected between the first surface and the second surface. At least one semiconductor device is formed on the first surface. Then, an anisotropy etching process is performed to the second surface with a mask to remove portions of the wafer while remaining the side surface thereby forming a number of grooves in the second surface and at least one reinforcing wall between the grooves. As a result, a thinned wafer is obtained.Type: GrantFiled: May 23, 2012Date of Patent: June 17, 2014Assignee: United Microelectronics CorporationInventors: Chang-Sheng Hsu, Kuo-Yuh Yang, Kuo-Hsiung Huang, Yan-Da Chen, Chia-Wen Lien
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Publication number: 20130313691Abstract: A thinning method of a wafer is provided. The method includes the following steps. First, a wafer having a first surface, a second surface, and a side surface is provided, and the side surface is connected between the first surface and the second surface. At least one semiconductor device is formed on the first surface. Then, an anisotropy etching process is performed to the second surface with a mask to remove portions of the wafer while remaining the side surface thereby forming a number of grooves in the second surface and at least one reinforcing wall between the grooves. As a result, a thinned wafer is obtained.Type: ApplicationFiled: May 23, 2012Publication date: November 28, 2013Applicant: UNITED MICROELECTRONICS CORPORATIONInventors: Chang-Sheng Hsu, Kuo-Yuh Yang, Kuo-Hsiung Huang, Yan-Da Chen, Chia-Wen Lien
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Publication number: 20130299949Abstract: The present invention relates to a through silicon via (TSV). The TSV is disposed in a substrate including a via opening penetrating through a first surface and a second surface of the substrate. The TSV includes an insulation layer, a barrier layer, a buffer layer and a conductive electrode. The insulation layer is disposed on a surface of the via opening. The barrier layer is disposed on a surface of the insulation layer. The buffer layer is disposed on a surface of the barrier layer. The conductive electrode is disposed on a surface of the buffer layer and a remainder of the via opening is completely filled with the conductive electrode. A portion of the buffer layer further covers a surface of the conductive electrode at a side of the second surface and said portion is level with the second surface.Type: ApplicationFiled: July 22, 2013Publication date: November 14, 2013Applicant: UNITED MICROELECTRONICS CORP.Inventors: Kuo-Hsiung Huang, Chun-Mao Chiou, Hsin-Yu Chen, Yu-Han Tsai, Ching-Li Yang, Home-Been Cheng
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Patent number: 8518823Abstract: The present invention relates to a through silicon via (TSV). The TSV is disposed in a substrate including a via opening penetrating through a first surface and a second surface of the substrate. The TSV includes an insulation layer, a barrier layer, a buffer layer and a conductive electrode. The insulation layer is disposed on the surface of the via opening. The barrier layer is disposed on the surface of the insulation layer. The conductive electrode is disposed on the surface of the buffer layer and fills the via opening. The buffer layer further covers a surface of the conductive electrode at the side of the second surface. The present invention further discloses a method of forming the TSV.Type: GrantFiled: December 23, 2011Date of Patent: August 27, 2013Assignee: United Microelectronics Corp.Inventors: Kuo-Hsiung Huang, Chun-Mao Chiou, Hsin-Yu Chen, Yu-Han Tsai, Ching-Li Yang, Home-Been Cheng
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Publication number: 20130161796Abstract: The present invention relates to a through silicon via (TSV). The TSV is disposed in a substrate including a via opening penetrating through a first surface and a second surface of the substrate. The TSV includes an insulation layer, a barrier layer, a buffer layer and a conductive electrode. The insulation layer is disposed on the surface of the via opening. The barrier layer is disposed on the surface of the insulation layer. The conductive electrode is disposed on the surface of the buffer layer and fills the via opening. The buffer layer further covers a surface of the conductive electrode at the side of the second surface. The present invention further discloses a method of forming the TSV.Type: ApplicationFiled: December 23, 2011Publication date: June 27, 2013Inventors: Kuo-Hsiung Huang, Chun-Mao Chiou, Hsin-Yu Chen, Yu-Han Tsai, Ching-Li Yang, Home-Been Cheng