Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.

Abstract: Manufacturing of a shoe or a portion of a shoe is enhanced by executing various shoe-manufacturing processes in an automated fashion. For example, information describing a shoe part may be determined, such as an identification, an orientation, a color, a surface topography, an alignment, a size, etc. Based on the information describing the shoe part, automated shoe-manufacturing apparatuses may be instructed to apply various shoe-manufacturing processes to the shoe part, such as a pickup and placement of the shoe part with a pickup tool.

Abstract: An integrated circuit (IC) with active and dummy device cell arrays and a method of fabricating the same are discloses. The IC includes a substrate, an active device cell, and a dummy device cell. The active device cell includes an array of source/drain (S/D) regions of a first conductivity type disposed on or within the substrate and an array of gate structures with a first gate fill material disposed on the substrate. The dummy device cell includes a first array of S/D regions of the first conductivity type disposed on or within the substrate, a second array of S/D regions of a second conductivity type disposed on or within the substrate, and an array of dual gate structures disposed on the substrate. Each of the dual gate structures includes the first gate fill material and a second gate fill material that is different from the first gate fill material.

Abstract: A semiconductor device according to embodiments of the present disclosure includes a first die including a first bonding layer and a second die including a second hybrid bonding layer. The first bonding layer includes a first dielectric layer and a first metal coil embedded in the first dielectric layer. The second bonding layer includes a second dielectric layer and a second metal coil embedded in the second dielectric layer. The second hybrid bonding layer is bonded to the first hybrid bonding layer such that the first dielectric layer is bonded to the second dielectric layer and the first metal coil is bonded to the second metal coil.

Abstract: A current sense circuit includes a power transistor, a first level shifter, an operational transconductance amplifier (OTA), a second level shifter, and a dummy transistor. The power transistor has a first terminal and a power control terminal coupled to a control voltage. The first level shifter is coupled to the first terminal and pulls up a voltage of the first terminal to an operating voltage. The OTA is coupled to the first level shifter and converts the operating voltage into an operating current. The second level shifter is coupled to the OTA and pulls down the operating voltage to the voltage of the first terminal. The dummy transistor has a dummy control terminal with the control voltage, and a third terminal coupled to the second level shifter and having the same voltage as the voltage of the first terminal.

Abstract: A slope compensation circuit includes a first differential pair circuit, a current mirror unit, a first operating current generation circuit, and a transconductance compensation circuit. The first differential pair circuit is connected to a first current source and receives a pair of differential oscillation signals to generate a pair of differential currents corresponding to the differential oscillation signals. The current mirror unit is connected to the first differential pair circuit and mirrors the differential currents. The first operating current generation circuit is connected to the current mirror unit and generates a first operating current including the differential currents. The transconductance compensation circuit stabilizes a quiescent operating point of the first operating current generation circuit and receives the differential oscillation signals to generate an output current multiple times the value of the first operating current.

Abstract: A power amplifier with noise shaping function is provided. The power amplifier includes a differential mode integrator, an integration and adjustment unit and a switch unit. The differential mode integrator is used for receiving a differential mode input signal and a differential mode output signal, and outputting a differential mode first signal. The integration and adjustment unit is coupled to the differential mode integrator for receiving the first signal and an output signal and outputting a single-end mode second signal. The switch unit is used for receiving the second signal and outputting the differential mode output signal to drive the load. The present invention uses a common mode input signal instead of the single-end input signal to eliminate the common mode noise, and uses a 2nd-order (or more than that) integrating circuit instead of the conventional filter to achieve a preferred effect of reducing the off band noise.

Abstract: A preset circuit of an audio power amplifier includes an inverter and a voltage drop device. The inverter receives an input signal to output an output signal, and includes a first switch and a second switch. The first switch is controlled with the input signal, and has a first terminal coupled to a power voltage and a second terminal for outputting the output signal. The second switch is controlled with the input signal, and has a third terminal for outputting the output signal and a fourth terminal coupled to a low reference voltage. The voltage drop device is coupled between the first terminal of the first switch and the power voltage and configured to lower the power voltage. The output signal is kept at a low level when the voltage drop device and the first switch are de-actuated due to the power voltage having a level below a first threshold.

Abstract: The invention provides a switching audio power amplifier with de-noise function, including a first comparator, a second comparator, a logic control unit, a de-noise circuit, and a bridge circuit. The first comparator and the second comparator respectively generate the first PWM signal and the second PWM signal, and then the logic control unit performs logic operation to generate a third PWM signal and a fourth PWM signal. If the pulse width of the third PWM signal (or the fourth PWM signal) is lower than a threshold, the de-noise circuit increases the pulse width of the third PWM signal or the fourth PWM signal and outputs the fifth PWM signal and the sixth PWM signal to drive the bridge circuit. Next, the bridge circuit conducts a driving current alternately flowing to and from a load according to the firth PWM signal and the sixth PWM signal.

Abstract: A semiconductor device includes a first metal region, a plurality of vias, a plurality of second metal regions, a plurality of openings and a third metal region. The first metal region conducts source/drain current. The second metal regions are electrically connected to the first metal region through the vias for conducting the source/drain current, in which each of the second metal regions is disposed in a distance from the adjacent second metal regions. The third metal region is electrically connected to the second metal regions through the openings, in which the resistance of the third metal region is smaller than the resistances of the first metal region and the second metal regions.

Abstract: An audio power amplifier package includes a non-signal lead, a first non-signal pad, a second non-signal pad and a plurality of bonding wires. The first non-signal pad and the second non-signal pad are disposed on a substrate. The bonding wires connect the non-signal lead to the first non-signal pad and the second non-signal pad respectively.

Abstract: A power amplifier with noise shaping is disclosed. The power amplifier with noise shaping is able to minimize the noise interference a regular power amplifier encounters. The power amplifier includes a differential-mode integrator, a driving unit, and a low pass filter and integration unit. The differential-mode integrator receives a differential-mode input signal and a differential-mode feedback signal and performs integration operations to output a differential-mode intermediate signal. The driving unit outputs a differential-mode output signal and drives a load according to the differential-mode intermediate signal. The low pass filter and integration unit performs a filtering operation on the differential-mode output signal and integration operations to output the differential-mode feedback signal to the differential-mode integrator.

Abstract: A current sense circuit includes a power transistor, a first level shifter, an operational transconductance amplifier (OTA), a second level shifter, and a dummy transistor. The power transistor has a first terminal and a power control terminal coupled to a control voltage. The first level shifter is coupled to the first terminal and pulls up a voltage of the first terminal to an operating voltage. The OTA is coupled to the first level shifter and converts the operating voltage into an operating current. The second level shifter is coupled to the OTA and pulls down the operating voltage to the voltage of the first terminal. The dummy transistor has a dummy control terminal with the control voltage, and a third terminal coupled to the second level shifter and having the same voltage as the voltage of the first terminal.

Abstract: A slope compensation circuit includes a first differential pair circuit, a current mirror unit, a first operating current generation circuit, and a transconductance compensation circuit. The first differential pair circuit is connected to a first current source and receives a pair of differential oscillation signals to generate a pair of differential currents corresponding to the differential oscillation signals. The current mirror unit is connected to the first differential pair circuit and mirrors the differential currents. The first operating current generation circuit is connected to the current mirror unit and generates a first operating current including the differential currents. The transconductance compensation circuit stabilizes a quiescent operating point of the first operating current generation circuit and receives the differential oscillation signals to generate an output current multiple times the value of the first operating current.

Abstract: A driving circuit to drive an output stage comprising a high side NMOS and a low side NMOS is provided. The driving circuit comprises: a diode comprising an anode and a cathode, wherein the anode is electrically connected to a first voltage source and the sources of a first and a second PMOS; a third and a fourth PMOS both comprising a drain, a source and a gate, wherein the sources are respectively connected to the gates of the second and first PMOS, the drains are respectively connected to the drains of the first and second PMOS. A first and a second NMOS both comprise a drain, a source and a gate, wherein the drains are respectively connected to the drain of the fourth and third PMOS, the sources are coupled to a second voltage source, the gates are respectively connected to a first input and a second input.

Abstract: A semiconductor device includes a first metal region, a plurality of vias, a plurality of second metal regions, a plurality of openings and a third metal region. The first metal region conducts source/drain current. The second metal regions are electrically connected to the first metal region through the vias for conducting the source/drain current, in which each of the second metal regions is disposed in a distance from the adjacent second metal regions. The third metal region is electrically connected to the second metal regions through the openings, in which the resistance of the third metal region is smaller than the resistances of the first metal region and the second metal regions.

Abstract: A driving circuit to drive an output stage comprising a high side NMOS and a low side NMOS is provided. The driving circuit comprises: a diode comprising an anode and a cathode, wherein the anode is electrically connected to a first voltage source and the sources of a first and a second PMOS; a third and a fourth PMOS both comprising a drain, a source and a gate, wherein the sources are respectively connected to the gates of the second and first PMOS, the drains are respectively connected to the drains of the first and second PMOS. A first and a second NMOS both comprise a drain, a source and a gate, wherein the drains are respectively connected to the drain of the fourth and third PMOS, the sources are coupled to a second voltage source, the gates are respectively connected to a first input and a second input.

Abstract: A preset circuit of an audio power amplifier includes an inverter and a voltage drop device. The inverter receives an input signal to output an output signal, and includes a first switch and a second switch. The first switch is controlled with the input signal, and has a first terminal coupled to a power voltage and a second terminal for outputting the output signal. The second switch is controlled with the input signal, and has a third terminal for outputting the output signal and a fourth terminal coupled to a low reference voltage. The voltage drop device is coupled between the first terminal of the first switch and the power voltage and configured to lower the power voltage. The output signal is kept at a low level when the voltage drop device and the first switch are de-actuated due to the power voltage having a level below a first threshold.

Abstract: The invention provides a switching audio power amplifier with de-noise function, including a first comparator, a second comparator, a logic control unit, a de-noise circuit, and a bridge circuit. The first comparator and the second comparator respectively generate the first PWM signal and the second PWM signal, and then the logic control unit performs logic operation to generate a third PWM signal and a fourth PWM signal. If the pulse width of the third PWM signal (or the fourth PWM signal) is lower than a threshold, the de-noise circuit increases the pulse width of the third PWM signal or the fourth PWM signal and outputs the fifth PWM signal and the sixth PWM signal to drive the bridge circuit. Next, the bridge circuit conducts a driving current alternately flowing to and from a load according to the firth PWM signal and the sixth PWM signal.