Abstract: Methods and semiconductor devices are provided. A method includes determining a location of a polyimide opening (PIO) corresponding to an under-bump metallization (UBM) feature in a die. The die includes a substrate and an interconnect structure over the substrate. The method also includes determining a location of a stacked via structure in the interconnect structure based on the location of the PIO. The method further includes forming, in the interconnect structure, the stacked via structure comprising at most three stacked contact vias at the location of the PIO.

Abstract: A thin film transistor includes a substrate, a semiconductor layer, a gate insulating layer, a gate, a source and a drain. The semiconductor layer is located above the substrate. The gate insulating layer is located above the semiconductor layer. The gate is located above the gate insulating layer and overlapping with the semiconductor layer. The gate includes a first portion, a second portion and a third portion. The first portion is extending along the surface of the gate insulating layer and directly in contact with the gate insulating layer. The second portion is separated from the gate insulating layer. Taking the surface of the gate insulating layer as a reference, the top surface of the second portion is higher than the top surface of the first portion. The third portion connects the first portion to the second portion. The source and the drain are electrically connected to the semiconductor layer.

Abstract: A display panel includes a substrate, a first isolation structure, a second isolation structure and a plurality of light emitting structures. The first isolation structure is disposed on the substrate and includes a plurality of through holes. The second isolation substrate is laminated on the first isolation substrate and fills up the plurality of through holes of the first isolation substrate. The plurality of light emitting structures are disposed on the substrate and are isolated from each other via the second isolation structure.

Abstract: Provided is a display panel, including a substrate, multiple pixel circuits, an insulating layer, multiple first electrodes, a first isolation structure, and a second isolation structure. The pixel circuits are located on the substrate. The insulating layer is located on the pixel circuits and has multiple through holes. The first electrodes are located on the insulating layer and are respectively electrically connected to the pixel circuits through the through holes. The first isolation structure is located on the insulating layer and overlaps the through holes. The second isolation structure includes multiple separating parts and multiple cover parts. The separating parts and the first isolation structure at least partially overlap, and the cover parts respectively overlap the through holes and the first isolation structure.

Abstract: An organic light-emitting panel, including a substrate, a planarization layer, a reflective layer and a bank layer, is provided. The substrate has a display region and a periphery region beside the display region. The planarization layer is disposed on the substrate and has an indentation. The reflective layer is disposed on the planarization layer. The reflective layer is formed along a sidewall of the indentation. The bank layer is disposed on the planarization layer, covers the indentation, and has a periphery taper surface. The indentation is adjacent to the periphery taper surface and is closer to the display region than the periphery taper surface. A fabrication method of the above organic light-emitting panel is also provided.

Abstract: A display panel includes a substrate, a first isolation structure, a second isolation structure and a plurality of light emitting structures. The first isolation structure is disposed on the substrate and includes a plurality of through holes. The second isolation substrate is laminated on the first isolation substrate and fills up the plurality of through holes of the first isolation substrate. The plurality of light emitting structures are disposed on the substrate and are isolated from each other via the second isolation structure.

Abstract: An organic light-emitting panel, including a substrate, a planarization layer, a reflective layer and a bank layer, is provided. The substrate has a display region and a periphery region beside the display region. The planarization layer is disposed on the substrate and has an indentation. The reflective layer is disposed on the planarization layer. The reflective layer is formed along a sidewall of the indentation. The bank layer is disposed on the planarization layer, covers the indentation, and has a periphery taper surface. The indentation is adjacent to the periphery taper surface and is closer to the display region than the periphery taper surface. A fabrication method of the above organic light-emitting panel is also provided.

Abstract: A light emitting device including a base, a first electrode, a barrier structure layer, a light emitting layer and a second electrode is provided. The barrier structure layer includes a first barrier layer in contact with the first electrode, a second barrier layer and a third barrier layer. The first barrier layer, the second barrier layer and the third barrier layer stack sequentially. The materials of the first barrier layer and the third barrier layer include a dielectric material. The material of the second barrier layer includes a metal material. A boundary between the third barrier layer and the second barrier layer keeps a vertical distance from the first electrode. The light emitting structure layer is disposed between the first electrode and the second electrode and surrounded by the barrier structure layer. The thickness of the light emitting structure layer is not greater than the vertical distance.

Abstract: A light emitting device including a base, a first electrode, a barrier structure layer, a light emitting layer and a second electrode is provided. The barrier structure layer includes a first barrier layer in contact with the first electrode, a second barrier layer and a third barrier layer. The first barrier layer, the second barrier layer and the third barrier layer stack sequentially. The materials of the first barrier layer and the third barrier layer include a dielectric material. The material of the second barrier layer includes a metal material. A boundary between the third barrier layer and the second barrier layer keeps a vertical distance from the first electrode. The light emitting structure layer is disposed between the first electrode and the second electrode and surrounded by the barrier structure layer. The thickness of the light emitting structure layer is not greater than the vertical distance.

Abstract: A sensing element is provided. The sensing element includes an active layer, a first source, a second source, a drain, and a gate. The active layer is disposed on a substrate, wherein the active layer includes a first source region, a second source region, a drain region, and a channel region. The first source is electrically connected to the first source region. The second source is electrically connected to the second source region. The drain is electrically connected to the drain region. The gate is overlapped with the channel region in a normal direction of the substrate, wherein the first source is extended toward the channel region in a first direction, the second source is extended toward the channel region in a second direction, the first direction and the second direction are intersected with the normal direction, and an angle between the first direction and the second direction is not equal to 180 degrees.

Abstract: A sensing element is provided. The sensing element includes an active layer, a first source, a second source, a drain, and a gate. The active layer is disposed on a substrate, wherein the active layer includes a first source region, a second source region, a drain region, and a channel region. The first source is electrically connected to the first source region. The second source is electrically connected to the second source region. The drain is electrically connected to the drain region. The gate is overlapped with the channel region in a normal direction of the substrate, wherein the first source is extended toward the channel region in a first direction, the second source is extended toward the channel region in a second direction, the first direction and the second direction are intersected with the normal direction, and an angle between the first direction and the second direction is not equal to 180 degrees.

Abstract: A pixel structure of electroluminescent display panel includes a substrate, a display driving structure, a planarization structure and an electroluminescent device. The display driving structure is disposed on the substrate. The display driving structure includes a driving device. The planarization structure is disposed on the substrate. The planarization structure covers the top surface and the sidewall of the driving device, and the planarization structure has a contact hole partially exposing the driving device. The electroluminescent device is disposed on the planarization structure. The electroluminescent device includes an anode, a light-emitting layer and a cathode. The anode covers the top surface of the planarization structure and surrounds the sidewall of the planarization structure, and the anode is filled into the contact hole and electrically connected to the driving device. The light-emitting layer is disposed on the anode. The cathode is disposed on the light-emitting layer.

Abstract: A method for fabricating an electronic device is provided. The method for fabricating the electrical device comprises providing a substrate. A patterned first self-assembled monolayer (SAM) and an adjacent patterned second SAM are formed on the substrate, wherein the patterned first SAM has a higher affinity then that of the patterned second SAM. A conductive, semiconductor or insulating material is dissolved or suspended in a solvent to form a solution. The solution is coated on the substrate. The solvent in the solution is removed to selectively form a patterned conductive, semiconductor or insulating layer on the patterned first SAM.

Abstract: A method for fabricating an electronic device is provided. The method for fabricating the electrical device comprises providing a substrate. A patterned first self-assembled monolayer (SAM) and an adjacent patterned second SAM are formed on the substrate, wherein the patterned first SAM has a higher affinity then that of the patterned second SAM. A conductive, semiconductor or insulating material is dissolved or suspended in a solvent to form a solution. The solution is coated on the substrate. The solvent in the solution is removed to selectively form a patterned conductive, semiconductor or insulating layer on the patterned first SAM.