Abstract: A wake-up radio system in a wireless sensor network, the wake-up radio comprising: an analog front end configured to communicate with matching network; an analog to digital converter coupled to the analog front end; and a digital baseband coupled to the analog to digital converter, wherein the digital baseband outputs a fast wake-up signal and a secure wake-up signal, and wherein the wake-up radio listens to all channels simultaneously.

Abstract: Embodiments of the invention include a wakeup receiver (WRX) featuring a charge-domain analog front end (AFE) with parallel radio frequency (RF) rectifier, charge-transfer summation amplifier (CTSA), and successive approximation analog-to-digital converter (SAR ADC) stages. The WRX operates at very low power and exhibits above-average sensitivity, random pulsed interferer rejections, and yield over process.

Abstract: A wake-up radio system in a wireless sensor network, the wake-up radio comprising: an analog front end configured to communicate with matching network; an analog to digital converter coupled to the analog front end; and a digital baseband coupled to the analog to digital converter, wherein the digital baseband outputs a fast wake-up signal and a secure wake-up signal, and wherein the wake-up radio listens to all channels simultaneously.

Abstract: Embodiments of the invention include a wakeup receiver (WRX) featuring a charge-domain analog front end (AFE) with parallel radio frequency (RF) rectifier, charge-transfer summation amplifier (CTSA), and successive approximation analog-to-digital converter (SAR ADC) stages. The WRX operates at very low power and exhibits above-average sensitivity, random pulsed interferer rejections, and yield over process.

Abstract: Embodiments of the invention include a wakeup receiver (WRX) featuring a charge-domain analog front end (AFE) with parallel radio frequency (RF) rectifier, charge-transfer summation amplifier (CTSA), and successive approximation analog-to-digital converter (SAR ADC) stages. The WRX operates at very low power and exhibits above-average sensitivity, random pulsed interferer rejections, and yield over process.

Abstract: Embodiments of the invention include a wakeup receiver (WRX) featuring a charge-domain analog front end (AFE) with parallel radio frequency (RF) rectifier, charge-transfer summation amplifier (CTSA), and successive approximation analog-to-digital converter (SAR ADC) stages. The WRX operates at very low power and exhibits above-average sensitivity, random pulsed interferer rejections, and yield over process.

Abstract: A wake-up radio system in a wireless sensor network, the wake-up radio comprising: an analog front end configured to communicate with matching network; an analog to digital converter coupled to the analog front end; and a digital baseband coupled to the analog to digital converter, wherein the digital baseband outputs a fast wake-up signal and a secure wake-up signal, and wherein the wake-up radio listens to all channels simultaneously.

Abstract: Embodiments of the invention include a wakeup receiver (WRX) featuring a charge-domain analog front end (AFE) with parallel radio frequency (RF) rectifier, charge-transfer summation amplifier (CTSA), and successive approximation analog-to-digital converter (SAR ADC) stages. The WRX operates at very low power and exhibits above-average sensitivity, random pulsed interferer rejections, and yield over process.

Abstract: An integrated ultra wideband transceiver. The transceiver comprises a transmitter, a receiver, and at least one on-chip monopole antenna electrically connected to at least one of the transmitter or receiver for transmitting and/or receiving electrical signals. The transceiver further comprises a clock generator comprising a temperature-compensated relaxation oscillator, a baseband controller electrically connected to, and configured to exert a measure of control over, at least one the transmitter, receiver, or clock generator, and a micro-battery operative to provide operating power to each of the transmitter, receiver, clock generator, and baseband controller.

Abstract: An integrated ultra wideband transceiver. The transceiver comprises a transmitter, a receiver, and at least one on-chip monopole antenna electrically connected to at least one of the transmitter or receiver for transmitting and/or receiving electrical signals. The transceiver further comprises a clock generator comprising a temperature-compensated relaxation oscillator, a baseband controller electrically connected to, and configured to exert a measure of control over, at least one the transmitter, receiver, or clock generator, and a micro-battery operative to provide operating power to each of the transmitter, receiver, clock generator, and baseband controller.