Abstract: A flexible circuit board includes a flexible substrate, a first circuit and a second circuit. The first circuit is provided on a first area defined on the top surface and includes a first input terminal and a first output terminal. The first input terminal is adjacent to a bottom side of the top surface and the first output terminal is adjacent to a top side of the top surface. The second circuit is provided on a second area defined on the top surface and includes a second input terminal and a second output terminal. The second input terminal is adjacent to the top side of the top surface and the second output terminal is adjacent to the bottom side of the top surface.

Abstract: A thin film circuit board includes a substrate and a thermal conductive film which is adhered to the substrate and includes a first conductive portion, a second conductive portion and a third conductive portion. The thermal conductive film is designed to be polygonal and non-rectangular in order to reduce stress generated in the substrate and the thermal conductive film and protect the thin film circuit board from warpage.

Abstract: The invention provides a semiconductor processing machine, which comprises a plurality of chambers, at least one of the chamber is a load-lock chamber, and the load-lock chamber comprises a bottom surface and a top lid opposite to the bottom surface; and a gas pipeline is connected with the top lid of the load-lock chamber.

Abstract: A circuit board includes a substrate and a metallic layer. A first area and at least one second area are defined on a portion of the substrate, the second area is located outside the first area. The metallic layer includes first test lines disposed on the first area and second test lines disposed on the second area. A first test pad of each of the first test lines has a first width, and a second test pad of each of the second test lines has a second width. The second width is greater than the first width such that probes of an electrical testing tool can contact the first and second test pads on the circuit board correctly during electrical testing.

Abstract: A manufacturing method of a resistive memory device includes the following steps. A first electrode is formed. A first metal oxide layer is formed on the first electrode, and the first metal oxide layer includes first metal atoms. A multilayer insulator structure is formed on the first metal oxide layer. A second metal oxide layer is formed on the multilayer insulator structure. The second metal oxide layer includes second metal atoms, the multilayer insulator structure includes third metal atoms, and each of the third metal atoms is identical to each of the second metal atoms. A second electrode is formed on the second metal oxide layer. The multilayer insulator structure is disposed between the first metal oxide layer and the second metal oxide layer in a vertical direction, and an atomic percent of the third metal atoms in the multilayer insulator structure changes in the vertical direction.

Abstract: A cleaning process of wafer polishing pad, the process includes providing a wafer polishing pad, performing a planarization process with the wafer polishing pad, leaving a residue on the wafer polishing pad after the planarization process, and performing a cleaning step with a cleaning nozzle to remove the residue, the cleaning nozzle comprises at least one Y-shaped pipe, one end of which is a water outlet, and the other two ends are respectively a water inlet and an air inlet, wherein a cleaning liquid flows from the water inlet to the water outlet, and a pressurized gas flows in from the air inlet.

Abstract: A resistive memory device includes a first electrode, a second electrode, a first metal oxide layer, a second metal oxide layer, and a multilayer insulator structure. The first metal oxide layer is disposed between the first electrode and the second electrode in a vertical direction. The second metal oxide layer is disposed between the first metal oxide layer and the second electrode in the vertical direction. The multilayer insulator structure is disposed between the first metal oxide layer and the second metal oxide layer in the vertical direction. The first metal oxide layer includes first metal atoms, the second metal oxide layer includes second metal atoms, and the multilayer insulator structure includes third metal atoms. Each of the third metal atoms is identical to each of the second metal atoms, and an atomic percent of the third metal atoms in the multilayer insulator structure gradually changes in the vertical direction.

Abstract: A resistive memory device includes a first electrode, a second electrode, a first metal oxide layer, a second metal oxide layer, and a multilayer insulator structure. The first metal oxide layer is disposed between the first electrode and the second electrode in a vertical direction. The second metal oxide layer is disposed between the first metal oxide layer and the second electrode in the vertical direction. The multilayer insulator structure is disposed between the first metal oxide layer and the second metal oxide layer in the vertical direction. The first metal oxide layer includes first metal atoms, the second metal oxide layer includes second metal atoms, and the multilayer insulator structure includes third metal atoms. Each of the third metal atoms is identical to each of the second metal atoms, and an atomic percent of the third metal atoms in the multilayer insulator structure gradually changes in the vertical direction.

Abstract: A resistive memory device includes a first electrode, a second electrode, a first metal oxide layer, a second metal oxide layer, and a multilayer insulator structure. The first metal oxide layer is disposed between the first electrode and the second electrode in a vertical direction. The second metal oxide layer is disposed between the first metal oxide layer and the second electrode in the vertical direction. The multilayer insulator structure is disposed between the first metal oxide layer and the second metal oxide layer in the vertical direction. The first metal oxide layer includes first metal atoms, the second metal oxide layer includes second metal atoms, and the multilayer insulator structure includes third metal atoms. Each of the third metal atoms is identical to each of the second metal atoms, and an atomic percent of the third metal atoms in the multilayer insulator structure gradually changes in the vertical direction.

Abstract: An adaptive lubrication control method used in an adaptive lubrication control system for a machining center having an axial system comprises a controller and a lubricating system. The method uses a built-in macro program unit and programmable logic unit of the controller to acquire the feed rate and load data of the axial system of the machining center for computing the shift parameter of the axial system so that the optimal lubrication timing and lubrication time length can be figured out for controlling the lubricating system to lubricate the axial system automatically.

Abstract: A power supply employs an error detecting circuit to output an error signal when detecting an overvoltage or overcurrent occurred in one of output powers and employs a latch trigger circuit to cause the power supply to enter a latch mode when receiving the error signal. The power supply will keep the latch mode when entering the latch mode until the AC power VAC is removed. In addition, the power supply employs the error detecting circuit to provide the accurate safety threshold value by the constant current source with temperature compensation function and stable constant current output.

Abstract: A power supply employs an error detecting circuit to output an error signal when detecting an overvoltage or overcurrent occurred in one of output powers and employs a latch trigger circuit to cause the power supply to enter a latch mode when receiving the error signal. The power supply will keep the latch mode when entering the latch mode until the AC power VAC is removed. In addition, the power supply employs the error detecting circuit to provide the accurate safety threshold value by the constant current source with temperature compensation function and stable constant current output.

Abstract: The integrity of control signals used to control a wafer handling robot is monitored by a monitor connected to various points of the robotic control system. The monitor includes a memory for storing data sets representing correct, reference characteristics of the control signals. The monitor samples control signals at various points in the control system and compares these sampled signals with the stored reference characteristics in order to determine whether a signal disparity exists. If a disparity exists, the monitor generates an error.

Abstract: The integrity of control signals used to control a wafer handling robot is monitored by a monitor connected to various points of the robotic control system. The monitor includes a memory for storing data sets representing correct, reference characteristics of the control signals. The monitor samples control signals at various points in the control system and compares these sampled signals with the stored reference characteristics in order to determine whether a signal disparity exists. If a disparity exists, the monitor generates an error.

Abstract: A semiconductor fabrication method is provided for fabricating a resistor and a capacitor electrode in an integrated circuit, which can help enhance the quality of the resultant integrated circuit. In this method, the first step is to form a polysilicon layer. Then, optionally, a first oxide layer is formed over the polysilicon layer. Next, a first ion-implantation process is performed on the entire polysilicon layer so as to convert it into a lightly-doped polysilicon layer with a first predefined impurity concentration. After this, a second ion-implantation process is performed solely on the predefined electrode part of the polysilicon layer so as to convert this part into a heavily-doped polysilicon layer with a second predefined impurity concentration higher than the first impurity concentration. Subsequently, a selective removal process is performed to remove selected parts of the lightly-doped part and the heavily-doped part of the polysilicon layer.

Abstract: A semiconductor fabrication method is provided for fabricating a resistor and a capacitor electrode in an integrated circuit, which can help enhance the quality of the resultant integrated circuit. In this method, the first step is to form a polysilicon layer. Then, optionally, a first oxide layer is formed over the polysilicon layer. Next, a first ion-implantation process is performed on the entire polysilicon layer so as to convert it into a lightly-doped polysilicon layer with a first predefined impurity concentration. After this, a second ion-implantation process is performed solely on the predefined electrode part of the polysilicon layer so as to convert this part into a heavily-doped polysilicon layer with a second predefined impurity concentration higher than the first impurity concentration. Subsequently, a selective removal process is performed to remove selected parts of the lightly-doped part and the heavily-doped part of the polysilicon layer.

Abstract: A horizontal-type silicon-nitride furnace (HOSINF) having two tubes is provided. The HOSINF includes an outer tube and an inner tube. One end of the outer tube is coupled to a pump. The other end of the outer tube can be well sealed by a door through a flange. The inner tube is located inside the outer tube. The inner tube has a closed end and an opened end, in which the opened end is near to the door, and the closed end is near to the pump. The inner tube includes a first gas inlet and a second gas inlet. Desired reaction gases are flushed into the inner tube from the first inlet and the second inlet. The inner tube surrounds a paddle carrying several wafers, on which a silicon nitride layer is to be formed. The paddle is mounted on the door. A heater is located on a side periphery of the outer tube.

Abstract: A method of forming an inter-metal dielectric layer using hydrogen silsesquoxane (HSQ) as one of the dielectric layers. HSQ is a highly fluidic material that has a high gap-filling capacity. Therefore, the desired thickness and uniformity can be obtained in a single coating operation. Furthermore, when the HSQ layer is cured in an atmosphere of gaseous nitrogen, the HSQ layer is able to attain a high degree of planarity. Consequently, there is no need to planarize the dielectric layer before carrying out subsequent operations.

Abstract: The present invention is related to a diesel engine fuel pipeline heating device and particularly to a diesel engine fuel pipeline heating device consisting of an electric heating device and a water (or air) temperature heating device provided to the exterior of diesel engine fuel pipe. A diesel engine equipped with such a heating device can be easily started through the electric heating device to heat the fuel in the fuel pipe up to a suitable starting temperature around 40.degree. C. (or 104.degree. F.) before starting the engine; and after starting the engine for some time, namely, when the temperature in the heating cylinder of water (or air) heating device has risen to the said suitable combustion temperature around 40.degree. C. (or 104.degree. F.), the power source of electric heating device is automatically turned off to stop the heating action.