Patents by Inventor Kuo-Liang Wei

Kuo-Liang Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170041142
    Abstract: A signal processing method includes: fetching an encrypted identifier of a controlled apparatus; filling the encrypted identifier into a device identification field of a data format of a control signal; generating an encrypted time code according to system time and an adjusting code of a controlling apparatus; filling the encrypted time code into a time identification field of the data format; generating a control signal having both device identification field and time identification field; receiving the control signal and fetching both device identification field and time identification field; comparing the device identification field with a predetermined device identification field; comparing the time identification field with the predetermined time identification field if the device identification field is equal to the predetermined device identification field; and executing an operation corresponsive to the control signal by the controlled apparatus if the time identification field is greater than the pre
    Type: Application
    Filed: March 30, 2016
    Publication date: February 9, 2017
    Inventors: KUN-LIANG HSIEH, KUO-LIANG WEI, CHING-YAU KANG, WENG-WAH CHNG
  • Patent number: 8372714
    Abstract: A semiconductor device can be manufactured by a method that includes forming a structure that includes a plurality of layers of semiconductor material. One or more etching processes are performed on the multi-layered semiconductor structure, and then an Ar/O2 treatment is performed on the multi-layered semiconductor structure. The Ar/O2 treatment includes exposure of the structure to Ar ion bombardment and O2 molecular oxidation. The Ar/O2 treatment can be used to create a bottle-shaped structure.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: February 12, 2013
    Assignee: Macronix International Co., Ltd.
    Inventors: Kuo Liang Wei, Hong-Ji Lee
  • Publication number: 20110316096
    Abstract: A semiconductor device can be manufactured by a method that includes forming a structure that includes a plurality of layers of semiconductor material. One or more etching processes are performed on the multi-layered semiconductor structure, and then an Ar/O2 treatment is performed on the multi-layered semiconductor structure. The Ar/O2 treatment includes exposure of the structure to Ar ion bombardment and O2 molecular oxidation. The Ar/O2 treatment can be used to create a bottle-shaped structure.
    Type: Application
    Filed: June 28, 2010
    Publication date: December 29, 2011
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Kuo Liang Wei, Hong-Ji Lee
  • Patent number: 8076778
    Abstract: A semiconductor device and related method for fabricating the same include providing a stacked structure including an insulating base layer and lower and upper barrier layers with a conductive layer in between, etching the stacked structure to provide a plurality of conductive columns that each extend from the lower barrier layer, each of the conductive columns having an overlying upper barrier layer cap formed from the etched upper barrier layer, wherein the lower barrier layer is partially etched to provide a land region between each of the conductive lines, forming a liner layer over the etched stacked structure exposing the land region, and etching the liner layer and removing the exposed land region to form a plurality of conductive lines.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: December 13, 2011
    Assignee: Macronix International Co., Ltd.
    Inventors: Kuo Liang Wei, Hsu Sheng Yu, Hong-Ji Lee
  • Patent number: 7960835
    Abstract: A method of fabricating metal film stacks is described that reduces or eliminates adverse effects of photolithographic misalignments. A bottom critical dimension is increased by removal of a bottom titanium nitride barrier.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: June 14, 2011
    Assignee: Macronix International Co., Ltd.
    Inventors: Han-Hui Hsu, Ta-Hung Yang, Shih-Ping Hong, Ming-Tsung Wu, An-Chi Wei, Ching-Hsiung Li, Kuo-Liang Wei
  • Publication number: 20110074030
    Abstract: A semiconductor device and related method for fabricating the same include providing a stacked structure including an insulating base layer and lower and upper barrier layers with a conductive layer in between, etching the stacked structure to provide a plurality of conductive columns that each extend from the lower barrier layer, each of the conductive columns having an overlying upper barrier layer cap formed from the etched upper barrier layer, wherein the lower barrier layer is partially etched to provide a land region between each of the conductive lines, forming a liner layer over the etched stacked structure exposing the land region, and etching the liner layer and removing the exposed land region to form a plurality of conductive lines
    Type: Application
    Filed: September 30, 2009
    Publication date: March 31, 2011
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Kuo Liang Wei, Hsu Sheng Yu, Hong-Ji Lee
  • Publication number: 20100276807
    Abstract: A method of fabricating metal film stacks is described that reduces or eliminates adverse effects of photolithographic misalignments. A bottom critical dimension is increased by removal of a bottom titanium nitride barrier.
    Type: Application
    Filed: May 4, 2009
    Publication date: November 4, 2010
    Inventors: Han-Hui Hsu, Ta-Hung Yang, Shih-Ping Hong, Ming-Tsung Wu, An-Chi Wei, Ching-Hsiung Li, Kuo-Liang Wei
  • Patent number: 7648924
    Abstract: A method of manufacturing an L-shaped spacer is described. First, a substrate is provided and a protruding structure is formed thereon. Next, a dielectric material is formed on the substrate and covers the stacked structure. Then, the dielectric material on the top of the protruding structure and on portions of the substrate is removed to form an L-shaped spacer.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: January 19, 2010
    Assignee: MACRONIX International Co., Ltd.
    Inventor: Kuo-Liang Wei
  • Publication number: 20080242092
    Abstract: A method of manufacturing an L-shaped spacer is described. First, a substrate is provided and a protruding structure is formed thereon. Next, a dielectric material is formed on the substrate and covers the stacked structure. Then, the dielectric material on the top of the protruding structure and on portions of the substrate is removed to form an L-shaped spacer.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventor: Kuo-Liang Wei
  • Patent number: 7105099
    Abstract: A method of reducing pattern pitch is provided. A material layer, a hard mask layer and a patterned photoresist layer are sequentially formed over a substrate. Using the patterned photoresist layer as etching mask, the hard mask layer is etched. Due to the trenching effect, a residual hard mask layer remains in an exposed region exposed by the photoresist layer and micro-trenches are formed at the edges of the residual hard mask layer. Thereafter, using the residual hard mask layer as etching mask to pattern the material layer. Finally, the patterned photoresist layer and the hard mask layer are removed. In the invention, the trenching effect is utilized when etching the hard mask layer. A portion of the hard mask layer remains, and the micro-trenches are formed in the hard mask layer. After the micro-trenches are transferred to the material layer, the pattern pitch can be reduced.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: September 12, 2006
    Assignee: MACRONIX International Co., Ltd.
    Inventors: Henry Chung, Ming-Chung Liang, An-Chi Wei, Shin-Yi Tsai, Kuo-Liang Wei
  • Publication number: 20060011575
    Abstract: A method of reducing pattern pitch is provided. A material layer, a hard mask layer and a patterned photoresist layer are sequentially formed over a substrate. Using the patterned photoresist layer as etching mask, the hard mask layer is etched. Due to the trenching effect, a residual hard mask layer remains in an exposed region exposed by the photoresist layer and micro-trenches are formed at the edges of the residual hard mask layer. Thereafter, using the residual hard mask layer as etching mask to pattern the material layer. Finally, the patterned photoresist layer and the hard mask layer are removed. In the invention, the trenching effect is utilized when etching the hard mask layer. A portion of the hard mask layer remains, and the micro-trenches are formed in the hard mask layer. After the micro-trenches are transferred to the material layer, the pattern pitch can be reduced.
    Type: Application
    Filed: July 14, 2004
    Publication date: January 19, 2006
    Inventors: Henry Chung, Ming-Chung Liang, An-Chi Wei, Shin-Yi Tsai, Kuo-Liang Wei
  • Patent number: D486492
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: February 10, 2004
    Assignee: Benq Corporation
    Inventors: Yu-Ming Sheu, Wan-Hua Wu, Chien-Chung Hsueh, Mei-Chieh Ku, Tzu-Yu Huang, Wei-Chieh Lee, Kuo-Liang Wei
  • Patent number: D487461
    Type: Grant
    Filed: March 3, 2003
    Date of Patent: March 9, 2004
    Assignee: Benq Corporation
    Inventors: Yu-Ming Sheu, Wan-Hua Wu, Chien-Chung Hsueh, Mei-Chieh Ku, Tzu-Yu Huaug, Wei-Chieh Lee, Kuo-Liang Wei