Patents by Inventor Kuo Liang Wu

Kuo Liang Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096825
    Abstract: A bond head is provided. The bond head includes a bond base, a chuck member, and an elastic material. The chuck member protrudes from a surface of the bond base, and has a chuck surface formed with vacuum holes for holding a die using differential air pressure. In the direction parallel to the chuck surface, the width of the chuck surface is less than the width of the bond base and is equal to or greater than the width of the die. The elastic material is disposed over the chuck surface. The elastic material is arranged around the periphery of the chuck surface to cover edges and/or corners of the chuck surface.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 21, 2024
    Inventors: Chen-Hua YU, Chih-Hang TUNG, Kuo-Chung YEE, Yian-Liang KUO, Jiun-Yi WU
  • Publication number: 20240084455
    Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 14, 2024
    Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Publication number: 20240090234
    Abstract: A magnetoresistive random access memory (MRAM) includes a first transistor and a second transistor on a substrate, a source line coupled to a first source/drain region of the first transistor, and a first metal interconnection coupled to a second source/drain region of the first transistor. Preferably, the first metal interconnection is extended to overlap the first transistor and the second transistor and the first metal interconnection further includes a first end coupled to the second source/drain region of the first transistor and a second end coupled to a magnetic tunneling junction (MTJ).
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Hsing Lee, Sheng-Yuan Hsueh, Te-Wei Yeh, Chien-Liang Wu
  • Publication number: 20210180952
    Abstract: A microelectromechanical gyroscope system is provided. The system includes a first substrate, a second substrate, and a third substrate. The substrates respectively have a first fixing, a second fixing, and a third fixing surfaces. The system further includes a first sensing, a second sensing and a third sensing module boards respectively fixed to the fixing surfaces. Each sensing module board has several microelectromechanical gyroscopes. A signal processing control board is electrically connected to the first sensing module board, the second sensing module board, and the third sensing module board. Wherein the first substrate, the second substrate, and the third substrate are perpendicular to each other. With the above structure, on each system coordinate axis of the microelectromechanical gyroscope system, at least one gyroscope is aligned with it for data acquisition and measurement. Accordingly, the measurement accuracy of the system is improved.
    Type: Application
    Filed: April 3, 2020
    Publication date: June 17, 2021
    Applicant: National Applied Research Laboratories
    Inventors: Yung-Fu Tsai, Yeong-Wei Wu, Min-Yu Hsieh, Kuo-Liang Wu, Ying-Wen Jan, Chen-Tsung Lin
  • Publication number: 20070290325
    Abstract: A surface mounting structure and a packaging method thereof comprises a chip, a first conducting wire and a second conducting wire. The two conducting wires instead of lead frame architecture of the prior art is that the lead frame and a bridge jumper connected with N junction and P junction instead of the two conducting wires. The two conducting wires are drawn out from a bottom of a package, and are pressed and bent to original surface of the surface mounting pins so as to increase space utilization rate. Thereby it is to improve a complicated lead frame architecture of the prior art, increase use space and simplify system design.
    Type: Application
    Filed: June 16, 2006
    Publication date: December 20, 2007
    Inventors: Kuo-Liang Wu, Kuo-Shu Iu, Chih-Wei Chang
  • Publication number: 20070284703
    Abstract: A semiconductor package structure includes a substrate, a chip module, a lead frame, and a bridging element. The chip module is electrically connected to the substrate. The lead frame is disposed beside one side of the substrate, and the lead frame has a projecting block unit. The bridging element has one side electrically connected with the chip module, and a first positioning unit formed on the other side thereof for electrically retaining with the projecting block unit. Moreover, the semiconductor package structure of the present invention is applied to a design of multi-chip package, and ensures that a bridging element is connected with a chip via the bridging element being retained by a lead frame. In addition, the junction between the bridging element and the lead frame do not cause displacement between the lead frame and the bridging element during the packaging process.
    Type: Application
    Filed: June 7, 2006
    Publication date: December 13, 2007
    Inventors: Kuo-Liang Wu, Kuo-Shu Iu, Chih-Wei Chang
  • Publication number: 20070278638
    Abstract: A semiconductor package structure includes a substrate, a chip module, a lead frame, and a bridging element. The chip module is electrically connected to the substrate. The lead frame is disposed beside one side of the substrate, wherein the lead frame has a receiving unit. The bridging element has one side electrically connected with the chip module, and the bridging element has a positioning unit is formed on the other side thereof for electrically retaining in the receiving unit. Moreover, the semiconductor package structure of the present invention is applied to the design of multi-chip package, and ensures that a bridging element is connected with a chip via the bridging element retained with a lead frame. In addition, the junction between the bridging element and the lead frame do not cause displacement between the lead frame and the bridging element during the packaging process.
    Type: Application
    Filed: June 2, 2006
    Publication date: December 6, 2007
    Inventors: Kuo-Liang Wu, Kuo-Shu Lu, Chih-Wei Chang
  • Patent number: 6608373
    Abstract: A support structure of a power element includes a conductive mounting platform, a lead frame and a conductive lead. The conductive mounting platform includes an envelope engaging member, an interior conductive surface and an exterior conductive surface. The lead frame is with a first side and a second side. The first side is connected to at least one connecting element, which is connected to one side of the conductive mounting platform. The second side of the lead frame is with at least one conductive lead, including a first end and a second end that is connected with the second side of the lead frame so that the semiconductor device is secured on the interior conductive surface of the conductive mounting platform for establishing electrical connection. According to the aforementioned, the support structure can be easily assembled and manufactured.
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: August 19, 2003
    Assignee: Lite-On Semiconductor Corp.
    Inventors: Kuo Liang Wu, Claude Pouet
  • Publication number: 20030062615
    Abstract: A support structure of a power element includes a conductive mounting platform, a lead frame and a conductive lead. The conductive mounting platform includes an envelope engaging member, an interior conductive surface and an exterior conductive surface. The lead frame is with a first side and a second side. The first side is connected to at least one connecting element, which is connected to one side of the conductive mounting platform. The second side of the lead frame is with at least one conductive lead, including a first end and a second end that is connected with the second side of the lead frame so that the semiconductor device is secured on the interior conductive surface of the conductive mounting platform for establishing electrical connection. According to the aforementioned, the support structure can be easily assembled and manufactured.
    Type: Application
    Filed: October 3, 2001
    Publication date: April 3, 2003
    Inventors: Kuo Liang Wu, Claude Pouet