Abstract: A hierarchical downlink (DL) synchronization channel (SCH) is provided for wireless OFDM/OFDMA systems. The SCH includes a Primary SCH (P-SCH) for carrying PA-Preambles used for coarse timing and frequency synchronization, and a Secondary SCH (S-SCH) for carrying SA-Preambles used for cell ID detection. The total time length occupied by P-SCH and S-SCH is equal to one OFDM symbol time length of a data channel, and S-SCH is located in front of P-SCH in each DL frame. A perfect multi-period time-domain structure is created and maintained in P-SCH to increase preciseness of frame boundary estimation. With overlapping deployment of macrocells and femtocells, a predefined SCH configuration scheme is provided to separate frequency subbands used for macrocells and femtocells such that interferences in S-SCH can be mitigated. In addition, a self-organized SCH configuration scheme is provided to allow more flexibility for femtocells to avoid or introduce interference in S-SCH.

Abstract: A trench metal oxide semiconductor field effect transistor (MOSFET) includes an epitaxial layer over a substrate a first trench in the epitaxial layer and a second trench in the epitaxial layer. A depth of the first trench is different from a depth of the second trench. The trench MOSFET further includes a source region surrounding the self-aligned source contact, wherein the source region is convex-shaped. The trench MOSFET further includes a self-aligned source contact between the first trench and the second trench; wherein the self-aligned source contact is connected to the source region.

Abstract: The present invention provides methods for preparing TLR-4 receptor agonist E6020: and stereoisomers thereof, which compounds are useful as an immunological adjuvants when co-administered with antigens such as vaccines for bacterial and viral diseases. Also provided are synthetic intermediates.

Abstract: The process methods and structures mentioned above for creating a trench MOSFET enables self-aligned contacts to be formed to allow decreasing pitch size for trench MOSFET. The self-aligned contacts are formed by etching exposed silicon areas without using lithographical mask and alignment. As a result, the allowance for alignment can be saved and the pitch size can be decreased.

Abstract: An HDMI audio-video signal switching device comprises two housing bodies and a conductively connecting circuit board. Each of the housing bodies has an assembling end and a plugged end. The conductively connecting circuit board is a circuit board formed, at each end thereof corresponding to a positioning slot of each housing body, with a plugging projection sheet. Each plugging projection sheet has conductively connecting terminals. A portion of the conductively connecting circuit board between the two plugging projection sheets is set in the positioning slot, such that each plugging projection sheet and conductively connecting terminals thereon are allowed to pass through the positioning slot and then extend into a plugged hole, as well as the assembling ends of the two housing bodies are allowed to be butted and assembled together. Thereby, a more simplified structure is introduced for the HDMI audio-video signal switching device.

Abstract: A semiconductor device. The device comprises an active region isolated by an isolation structure on a substrate. The device further comprises a gate electrode extending across the active area and overlying the substrate, a pair of source region and drain region, disposed on either side of the gate electrode on the substrate in the active area, and a gate dielectric layer disposed between the substrate and the gate electrode. The gate dielectric layer comprises a relatively-thicker high voltage (HV) dielectric portion and a relatively-thinner low voltage (LV) dielectric portion, wherein the HV dielectric portion occupies a first intersection among the drain region, the isolation structure, and the gate electrode, and a second intersection among the source region, the isolation structure, and the gate electrode.

Abstract: The present disclosure provides a semiconductor memory device. The device includes a pinning layer having an anti-ferromagnetic material and disposed over a first electrode; a pinned layer disposed over the pinning layer; a composite layer disposed over the pinned layer, the composite layer having a magnetic material randomly distributed in a non-magnetic material; a barrier layer disposed on the composite layer; a free layer disposed over the barrier layer; and a second electrode disposed over the free layer.

Abstract: Disclosed herein are methods and intermediates useful in the preparation of macrolides, e.g., compounds of formula (IV) wherein R1-R12 are as defined herein.

Abstract: A high voltage (HV) device includes a gate dielectric structure over a substrate. The gate dielectric structure has a first portion and a second portion. The first portion has a first thickness and is disposed over a first well region of a first dopant type in the substrate. The second portion has a second thickness and is disposed over a second well region of a second dopant type. The first thickness is larger than the second thickness. An isolation structure is disposed between the gate dielectric structure and a drain region disposed within the first well region. A gate electrode is disposed over the gate dielectric structure.

Abstract: The present invention provides methods for preparing TLR-4 receptor agonist E6020: and stereoisomers thereof, which compounds are useful as an immunological adjuvants when co-administered with antigens such as vaccines for bacterial and viral diseases. Also provided are synthetic intermediates.

Abstract: A semiconductor structure includes a semiconductor substrate; an n-type tub extending from a top surface of the semiconductor substrate into the semiconductor substrate, wherein the n-type tub comprises a bottom buried in the semiconductor substrate; a p-type buried layer (PBL) on a bottom of the tub, wherein the p-type buried layer is buried in the semiconductor substrate; and a high-voltage n-type metal-oxide-semiconductor (HVNMOS) device over the PBL and within a region encircled by sides of the n-type tub.

Abstract: The present invention provides methods for preparing TLR-4 receptor agonist E6020: and stereoisomers thereof, which compounds are useful as an immunological adjuvants when co-administered with antigens such as vaccines for bacterial and viral diseases. Also provided are synthetic intermediates useful for implementing the inventive methods.

Abstract: A semiconductor device. The device comprises an active region isolated by an isolation structure on a substrate. The device further comprises a gate electrode extending across the active area and overlying the substrate, a pair of source region and drain region, disposed on either side of the gate electrode on the substrate in the active area, and a gate dielectric layer disposed between the substrate and the gate electrode. The gate dielectric layer comprises a relatively-thicker high voltage (HV) dielectric portion and a relatively-thinner low voltage (LV) dielectric portion, wherein the HV dielectric portion occupies a first intersection among the drain region, the isolation structure, and the gate electrode, and a second intersection among the source region, the isolation structure, and the gate electrode.

Abstract: A semiconductor device. The device comprises an active region isolated by an isolation structure on a substrate. The device further comprises a gate electrode extending across the active area and overlying the substrate, a pair of source region and drain region, disposed on either side of the gate electrode on the substrate in the active area, and a gate dielectric layer disposed between the substrate and the gate electrode. The gate dielectric layer comprises a relatively-thicker high voltage (HV) dielectric portion and a relatively-thinner low voltage (LV) dielectric portion, wherein the HV dielectric portion occupies a first intersection among the drain region, the isolation structure, and the gate electrode, and a second intersection among the source region, the isolation structure, and the gate electrode.

Abstract: The process methods and structures mentioned above for creating a trench MOSFET enables self-aligned contacts to be formed to allow decreasing pitch size for trench MOSFET. The self-aligned contacts are formed by etching exposed silicon areas without using lithographical mask and alignment. As a result, the allowance for alignment can be saved and the pitch size can be decreased.

Abstract: This invention relates to the synthesis for a precursor of E6020, compound 26, via a ?-keto amide alcohol intermediate, compound 22. The synthesis reacts compound 22 with compound 25 and the resultant intermediate is oxidized to produce compound 26, the precursor to E6020. Compounds 22 and 25, and their crystalline forms, represent separate embodiments of the invention. The invention also relates to compounds of formulas (3) and (4) and processes for their preparation. The ?-keto amide alcohol intermediate compound 22 is a compound of formula (3). Compound 25 is a compound of formula (4).

Abstract: Disclosed herein are methods and intermediates useful in the preparation of macrolides, e.g., compounds of formula (IV) wherein R1-R12 are as defined herein.

Abstract: A semiconductor structure includes a semiconductor substrate; a first well region of a first conductivity type in the semiconductor substrate; a metal-containing layer on the first well region, wherein the metal-containing layer and the first well region form a Schottky barrier; and a first heavily doped region of the first conductivity type in the first well region, wherein the first heavily doped region is horizontally spaced apart from the metal-containing layer.

Abstract: The present invention relates to a symbol acquisition apparatus and a method thereof. The method includes: determining a first boundary according to a first preamble symbol and generating a first confidence value according to signal quality of the first preamble symbol; determining a second boundary according to a second preamble symbol and generating a second confidence value according to signal quality of the second preamble symbol; and determining a symbol boundary from the first and the second boundaries according to the first and the second confidence values.

Abstract: This invention relates to the synthesis for a precursor of E6020, compound 26, via a ?-keto amide alcohol intermediate, compound 22. The synthesis reacts compound 22 with compound 25 and the resultant intermediate is oxidized to produce compound 26, the precursor to E6020. Compounds 22 and 25, and their crystalline forms, represent separate embodiments of the invention. The invention also relates to compounds of formulas (3) and (4) and processes for their preparation. The ?-keto amide alcohol intermediate compound 22 is a compound of formula (3). Compound 25 is a compound of formula (4).