Patents by Inventor Kuo NaiPing

Kuo NaiPing has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR MEMORY DEVICE BIT LINE TRANSISTOR WITH DISCRETE GATE
    Publication number: 20160307836
    Abstract: A semiconductor memory device is provided including a plurality of diffusion region pairs comprising first and second diffusion regions, wherein each of the diffusion regions comprise source and drain regions of a bit line transistor pair comprising a first bit line transistor and a second bit line transistor and a plurality of bit line transistor gate pairs in contact with the respective diffusion region pairs, wherein the first bit line transistor gate of the bit line transistor gate pairs comprises a gate portion of a first bit line transistor of the first diffusion region and the first bit lite transistor of the second diffusion region, wherein a second bit line transistor gate of the bit line transistor gate pairs comprises a gate portion of the second bit line transistor of the first diffusion region and the second bit line transistor of the second diffusion layer.
    Type: Application
    Filed: April 15, 2015
    Publication date: October 20, 2016
    Inventors: Ya Jung TSai, Lan Ting Huang, Kuo NaiPing, Chun-Lien Su