Patents by Inventor Kuo-Nan Hou

Kuo-Nan Hou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9312325
    Abstract: A method for forming a semiconductor device includes forming a capacitor bottom plate and a metal interconnect feature on a substrate. A dielectric layer having a predetermined thickness is then formed. The dielectric layer has a first portion overlying the capacitor bottom plate and a second portion overlying the metal interconnect feature. A thickness of the first portion of the dielectric layer is adjusted by either reducing the thickness or depositing additional dielectric material. A capacitor top plate is formed over the first portion of the dielectric layer.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: April 12, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shean-Ren Horng, Kuo-Nan Hou, Feng-Liang Lai
  • Publication number: 20150214290
    Abstract: A method for forming a semiconductor device includes forming a capacitor bottom plate and a metal interconnect feature on a substrate. A dielectric layer having a predetermined thickness is then formed. The dielectric layer has a first portion overlying the capacitor bottom plate and a second portion overlying the metal interconnect feature. A thickness of the first portion of the dielectric layer is adjusted by either reducing the thickness or depositing additional dielectric material. A capacitor top plate is formed over the first portion of the dielectric layer.
    Type: Application
    Filed: April 6, 2015
    Publication date: July 30, 2015
    Inventors: Shean-Ren Horng, Kuo-Nan Hou, Feng-Liang Lai
  • Patent number: 9000562
    Abstract: A method for forming a metal-insulator-metal (MIM) capacitor includes forming a capacitor bottom plate and a metal interconnect feature on a substrate. A dielectric layer having a predetermined thickness is then formed. The dielectric layer has a first portion overlying the capacitor bottom plate and a second portion overlying the metal interconnect feature. The dielectric layer is processed to adjust the thickness of the first portion of the dielectric layer relative the thickness of the second portion of the dielectric layer. Processing can include etching the first portion of the dielectric layer or adding dielectric material to the second portion of the dielectric layer. A capacitor top plate is formed over the first portion of the dielectric layer to complete the MIM structure.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: April 7, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shean-Ren Horng, Kuo-Nan Hou, Feng-Liang Lai
  • Publication number: 20110227195
    Abstract: A method for forming a metal-insulator-metal (MIM) capacitor includes forming a capacitor bottom plate and a metal interconnect feature on a substrate. A dielectric layer having a predetermined thickness is then formed. The dielectric layer has a first portion overlying the capacitor bottom plate and a second portion overlying the metal interconnect feature. The dielectric layer is processed to adjust the thickness of the first portion of the dielectric layer relative the thickness of the second portion of the dielectric layer. Processing can include etching the first portion of the dielectric layer or adding dielectric material to the second portion of the dielectric layer. A capacitor top plate is formed over the first portion of the dielectric layer to complete the MIM structure.
    Type: Application
    Filed: May 25, 2011
    Publication date: September 22, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shean-Ren Horng, Kuo-Nan Hou, Feng-Liang Lai
  • Patent number: 7964470
    Abstract: A method for forming a metal-insulator-metal (MIM) capacitor includes forming a capacitor bottom plate and a metal interconnect feature on a substrate. A dielectric layer having a predetermined thickness is then formed. The dielectric layer has a first portion overlying the capacitor bottom plate and a second portion overlying the metal interconnect feature. The dielectric layer is processed to adjust the thickness of the first portion of the dielectric layer relative the thickness of the second portion of the dielectric layer. Processing can include etching the first portion of the dielectric layer or adding dielectric material to the second portion of the dielectric layer. A capacitor top plate is formed over the first portion of the dielectric layer to complete the MIM structure.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: June 21, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shean-Ren Horng, Kuo-Nan Hou, Feng-Liang Lai
  • Publication number: 20070205248
    Abstract: A method for forming a metal-insulator-metal (MIM) capacitor includes forming a capacitor bottom plate and a metal interconnect feature on a substrate. A dielectric layer having a predetermined thickness is then formed. The dielectric layer has a first portion overlying the capacitor bottom plate and a second portion overlying the metal interconnect feature. The dielectric layer is processed to adjust the thickness of the first portion of the dielectric layer relative the thickness of the second portion of the dielectric layer. Processing can include etching the first portion of the dielectric layer or adding dielectric material to the second portion of the dielectric layer. A capacitor top plate is formed over the first portion of the dielectric layer to complete the MIM structure.
    Type: Application
    Filed: March 1, 2006
    Publication date: September 6, 2007
    Inventors: Shean-Ren Horng, Kuo-Nan Hou, Feng-Liang Lai