Abstract: A semiconductor device includes a substrate, a bottom electrode, a ferroelectric layer, a noble metal electrode, and a non-noble metal electrode. The bottom electrode is over the substrate. The ferroelectric layer is over the bottom electrode. The noble metal electrode is over the ferroelectric layer. The non-noble metal electrode is over the noble metal electrode.

Abstract: The present disclosure relates to an integrated chip structure. The integrated chip structure includes a first source/drain region and a second source/drain region disposed within a substrate. A select gate is over the substrate between the first source/drain region and the second source/drain region. A ferroelectric random access memory (FeRAM) device is over the substrate between the select gate and the first source/drain region. A transistor device is disposed on an upper surface of the substrate. The substrate has a recessed surface that is below the upper surface of the substrate and that is laterally separated from the upper surface of the substrate by a boundary isolation structure extending into a trench within the upper surface of the substrate. The FeRAM device is arranged over the recessed surface.

Abstract: A silicon carbide semiconductor device, in particular a monolithically integrated trench Metal-Oxide-Semiconductor Field-Effect Transistor with segmentally surrounded trench Schottky diode, includes a semiconductor substrate, a trench Metal-Oxide-Semiconductor Field-Effect Transistor and a trench Schottky diode. The trench Schottky diode has a perpendicularly disposed trench extending in a first horizontal direction, a metal electrode filled into the trench, and a plurality of doped regions disposed segmentally and extending in a second horizontal direction around the trench. The first horizontal direction is substantially orthogonal to the second horizontal direction, a side wall and a bottom wall of the metal electrode in the trench forms a Schottky junction, and the current flowing from the metal electrode is restricted between adjacent doped regions.

Abstract: A trench silicon carbide metal-oxide semiconductor field effect transistor includes a silicon carbide semiconductor substrate and a trench metal-oxide semiconductor field effect transistor, the field effect transistor includes a trench vertically arranged and penetrating along a first horizontal direction, a gate insulating layer formed on an inner wall of the trench, a first poly gate formed on the gate insulating layer, a shield region formed outsides and below the trench, and a field plate arranged between a bottom wall of the trench and the shield region, and the field plate has semiconductor doping and is laterally in contact to a current spreading layer to deplete electrons of the current spreading layer when a reverse bias voltage is applied.

Abstract: The invention provides a silicon carbide semiconductor device, in particular to a monolithically integrated trench Metal-Oxide-Semiconductor Field-Effect Transistor with segmentally surrounded trench Schottky diode, which comprises a semiconductor substrate, a trench Metal-Oxide-Semiconductor Field-Effect Transistor and a trench Schottky diode. The trench Schottky diode has a perpendicularly disposed trench extending in a first horizontal direction, a metal electrode filled into the trench, and a plurality of doped regions disposed segmentally and extending in a second horizontal direction around the trench. The first horizontal direction is substantially orthogonal to the second horizontal direction, a side wall and a bottom wall of the metal electrode in the trench forms a Schottky junction, and the current flowing from the metal electrode is restricted between adjacent doped regions.

Abstract: The present invention provides a silicon carbide (SiC) semiconductor device integrating a metal-oxide-semiconductor field-effect transistor (MOSFET) and a bidirectional voltage clamping circuit. An object of protecting a device is achieved by using the simple structure above, effectively preventing device damage that may be caused by a positive overvoltage and a negative overvoltage between a gate and a source.

Abstract: A silicon carbide power device is controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbide power device.

Abstract: A silicon carbride power device controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbride power device.

Abstract: A silicon carbide power device controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbide power device.

Abstract: A silicon carbide power device controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbide power device.

Abstract: The present invention provides a silicon carbide (SiC) semiconductor device integrating a metal-oxide-semiconductor field-effect transistor (MOSFET) and a bidirectional voltage clamping circuit. An object of protecting a device is achieved by using the simple structure above, effectively preventing device damage that may be caused by a positive overvoltage and a negative overvoltage between a gate and a source.