Patents by Inventor Kuo-Tung LEE

Kuo-Tung LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190214332
    Abstract: The present disclosure illustrates to a serially-connected transistor device including a lead line frame including a carrier board and an electrode pin set, and the carrier board including a first board and a second board, and the electrode pin set including a first pin electrically connected to the first board, and a second pin, a third pin and a fourth pin; and a die unit including a first die and a second die electrically connected to the first board and the second board, respectively, so that two transistors can be electrically connected in series in the serially-connected transistor device to increase reverse voltage. As a result, the serially-connected transistor device of the present disclosure can be produced by automation die bonding and wire bonding manner, so as to achieve the effect of automated production, high yield, low cost, and better product consistency and reliability.
    Type: Application
    Filed: January 10, 2018
    Publication date: July 11, 2019
    Inventors: Wen-Pin CHEN, Kuo-Tung LEE
  • Publication number: 20190214333
    Abstract: The present disclosure illustrates to a serially-connected transistor device including a lead line frame including a carrier board and an electrode pin set, and the carrier board including a first board and a second board, and the electrode pin set including a first pin electrically connected to the first board, and a second pin, a third pin and a fourth pin; and a die unit including a first die and a second die electrically connected to the first board and the second board, respectively, so that two transistors can be electrically connected in series in the serially-connected transistor device to increase reverse voltage. As a result, the serially-connected transistor device of the present disclosure can be produced by automation die bonding and wire bonding manner, so as to achieve the effect of automated production, high yield, low cost, and better product consistency and reliability.
    Type: Application
    Filed: January 7, 2019
    Publication date: July 11, 2019
    Inventors: Wen-Pin CHEN, Kuo-Tung LEE
  • Patent number: 10079553
    Abstract: The present disclosure illustrates an electronic component applicable single-phase or three-phase bridge rectifier circuit. The electronic component includes a lead frame, a first die, and a second die. The first and second pins of the lead frame are connected to the first and second boards respectively, and a surface of the first die opposite to the first board is connected to the second board, a surface of the second die opposite to the second board is connected a third pin of the lead frame. The bridge rectifier circuit may include two or three electronic components, and the first pins of the electronic components are connected to each other as a first DC output terminal, the third pins are electrically connected to each other as a second DC output terminal, and the second pins are served as AC input terminals, respectively.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: September 18, 2018
    Assignee: Sirectifier Electronics Co., Ltd.
    Inventors: Wen-Pin Chen, Kuo-Tung Lee
  • Publication number: 20180183429
    Abstract: An integrated series Schottky diode rectifier having the characteristics of high reverse voltage resistance, ease of fabrication, small size, high yield rate, automated fabrication applicability and low manufacturing cost is disclosed to include multiple lead frames, multiple Schottky diode chips mounted on the lead frames and connected in series, first conductor connected to the positive electrode of first Schottky diode chip, second conductor connected to the positive electrode of each of other Schottky diode chip and bridged onto the lead frame that carries the previous Schottky diode chip, electrode pin set including positive pin connected to first conductor at first Schottky diode chip, negative pin connected to negative electrode of last Schottky diode chip and external pin connected in series between second conductors of each two adjacent Schottky diode chips, and resin package body molded on lead frames and wrapped about Schottky diode chips and electrode pin set.
    Type: Application
    Filed: December 28, 2016
    Publication date: June 28, 2018
    Inventors: Wen-Pin CHEN, Kuo-Tung LEE