Patents by Inventor Kuo-Tung Wang

Kuo-Tung Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9526362
    Abstract: The invention relates to a lid structure of disposable beverage cups, a buckle portion is set on a lid rim of the lid, an inner containing groove is set on the buckle portion for the rim flange being buckled and placed inside, wherein, at least an elastic gap is set on the lid rim of the lid, two sides of the elastic gap has a moderate separated elasticity so as to combine with beverage cups manufactured by different manufacturers.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: December 27, 2016
    Inventor: Kuo Tung Wang
  • Publication number: 20160270571
    Abstract: The invention relates to a lid structure of disposable beverage cups, a buckle portion is set on a lid rim of the lid, an inner containing groove is set on the buckle portion for the rim flange being buckled and placed inside, wherein, at least an elastic gap is set on the lid rim of the lid, two sides of the elastic gap has a moderate separated elasticity so as to combine with beverage cups manufactured by different manufacturers.
    Type: Application
    Filed: March 20, 2015
    Publication date: September 22, 2016
    Inventor: Kuo Tung WANG
  • Patent number: 7239555
    Abstract: An erasing method for a non-volatile memory is provided. The method includes the following two major steps. (a) A first voltage is applied to the odd-numbered select gates of each memory row and a second voltage is applied to the even-numbered select gates of each memory row such that the voltage difference between the first voltage and the second voltage is large enough for the electrons injected into the floating gate of the memory cells to be removed via the select gate. (b) A switchover operation is performed so that the first voltage is applied to the even-numbered select gates of each memory row and the second voltage is applied to the odd-numbered select gates of each memory row such that the electrons injected into the floating gates of the memory cells are pulled away via the select gates to turn the memory cells into an erased state.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: July 3, 2007
    Assignee: Powerchip Semiconductor Corp.
    Inventors: Kuo-Tung Wang, Yen-Lee Pan, Kuo-Hao Chu, Cheng-Yuan Hsu
  • Publication number: 20070133306
    Abstract: An erasing method for a non-volatile memory is provided. The method includes the following two major steps. (a) A first voltage is applied to the odd-numbered select gates of each memory row and a second voltage is applied to the even-numbered select gates of each memory row such that the voltage difference between the first voltage and the second voltage is large enough for the electrons injected into the floating gate of the memory cells to be removed via the select gate. (b) A switchover operation is performed so that the first voltage is applied to the even-numbered select gates of each memory row and the second voltage is applied to the odd-numbered select gates of each memory row such that the electrons injected into the floating gates of the memory cells are pulled away via the select gates to turn the memory cells into an erased state.
    Type: Application
    Filed: March 3, 2006
    Publication date: June 14, 2007
    Inventors: Kuo-Tung Wang, Yen-Lee Pan, Kuo-Hao Chu, Cheng-Yuan Hsu