Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first stack structure and a second stack structure in a first area over a substrate, wherein each of the stack structures includes semiconductor layers separated and stacked up; depositing a first interfacial layer around each of the semiconductor layers of the stack structures; depositing a gate dielectric layer around the first interfacial layer; forming a dipole oxide layer around the gate dielectric layer; removing the dipole oxide layer around the gate dielectric layer of the second stack structure; performing an annealing process to form a dipole gate dielectric layer for the first stack structure and a non-dipole gate dielectric layer for the second stack structure; and depositing a first gate electrode around the dipole gate dielectric layer of the first stack structure and the non-dipole gate dielectric layer of the second stack structure.

Abstract: A method includes depositing a first work function layer over a first and second gate trench. The method includes depositing a second work function layer over the first work function layer. The method includes etching the second work function layer in the first gate trench while covering the second work function layer in the second gate trench, causing the first work function layer in the first gate trench to contain metal dopants that are left from the second work function layer etched in the first gate trench. The method includes forming a first active gate structure and second active gate structure, which include the first work function layer and the metal dopants left from the second work function layer in the first gate trench, and the first work function layer and no metal dopants left behind from the second work function layer, respectively.

Abstract: One embodiment of the present disclosure provides an optical device which includes a waveguide and a light modulator. The light modulator includes a phase-change material and is in direct contact with an outer surface of the waveguide. The optical device also includes a thermal conducting member. The thermal conducting member is positioned on the light modulating member. The optical device further includes a heating member. The heating member is placed on the thermal conducting member and is distant away from the light modulator and the waveguide. The heat produced from the heating member is transferred to the light modulator through the thermal conducting member thereby inducing a phase transition of the light modulator.

Abstract: The present disclosure is at least directed to utilizing air curtain devices to form air curtains to separate and isolate areas in which respective workpieces are stored from a transfer compartment within a workpiece processing apparatus. The transfer compartment of the workpiece processing apparatus includes a robot configured to transfer or transport ones of the workpieces to and from these respective storage areas through the transfer compartment and to and from a tool compartment. A tool is present in the tool compartment for processing and refining the respective workpieces. Clean dry air (CDA) may be circulated through the respective storage areas. The air curtains formed by the air curtain devices and the circulation of CDA through the respective storage areas reduces the likelihood of the generation of defects, damages, and degradation of the workpieces when present within the workpiece processing apparatus.

Abstract: The present disclosure provides a radiation detector, including a substrate, a pixel array formed on the substrate, a perovskite thick film formed on the pixel array and having a cubic crystal phase, a first electrode formed on the perovskite thick film and is opposite to the pixel array, and a readout circuit. The radiation detector has significantly reduced dark current density and high sensing sensitivity. The present disclosure also provides a method for preparing the perovskite thick film.

Abstract: A semiconductor device includes a first transistor located in a first region of a substrate and a second transistor located in a second region of the substrate. The first transistor includes first channel members vertically stacked above the substrate and a first gate structure wrapping around each of the first channel members. The first gate structure includes a first interfacial layer. The second transistor includes second channel members vertically stacked above the substrate and a second gate structure wrapping around each of the second channel members. The second gate structure includes a second interfacial layer. The second interfacial layer has a first sub-layer and a second sub-layer over the first sub-layer. The first and second sub-layers include different material compositions. A total thickness of the first and second sub-layers is larger than a thickness of the first interfacial layer.

Abstract: Phase change material (PCM) switches and methods of fabrication thereof that provide improved thermal confinement within a phase change material layer. A PCM switch may include a dielectric capping layer between a heater pad and the phase change material layer of the PCM switch that is laterally-confined such opposing sides of the dielectric capping layer the heater pad may form continuous surfaces extending transverse to the signal transmission pathway across the PCM switch. Heat transfer from the heater pad through the dielectric capping layer to the phase change material layer may be predominantly vertical, with minimal thermal dissipation along a lateral direction. The localized heating of the phase change material may improve the efficiency of the PCM switch enabling lower bias voltages, minimize the formation of regions of intermediate resistivity in the PCM switch, and improve the parasitic capacitance characteristics of the PCM switch.

Abstract: One embodiment of the present disclosure provides an optical device which includes a waveguide and a light modulator. The light modulator comprising a bridge segment positioned on the waveguide, wherein the bridge segment comprises a phase-change material. The optical device also includes a heating member. The heating member includes an intermediate segment and two electric contact segments. The intermediate segment is in direct contact with the bridge segment of the light modulator. The two electric contact segments are connected to two ends of the intermediate segment, wherein heat produced from the heating member is directly transferred to the bridge segment of the light modulator thereby inducing a phase transition thereof.

Abstract: A lithography system includes an immersion lithographic apparatus, a fluid supply device, and a sensor. The fluid supply is configured to supply fluid to the immersion lithographic apparatus. The fluid supply device includes at least one liquid storage tank, an upper liquid pipe and a lower liquid pipe connected to the liquid storage tank. The sensor includes at least one hydraulic pressure gauge. The at least one hydraulic pressure gauge is arranged near a lower part of the liquid storage tank and connected to the lower liquid pipe and the upper liquid pipe so as to measure the hydraulic pressure at a bottom of the liquid storage tank. The height of the liquid level in the liquid storage tank is calculated from the hydraulic pressure.

Abstract: Modified zeolite may include a microporous framework including a plurality of micropores having diameters of less than or equal to 2 nm, wherein the microporous framework includes at least silicon atoms and oxygen atoms; a plurality of mesopores having diameters of greater than 2 nm and less than or equal to 50 nm, wherein the plurality of mesopores are ordered with cubic symmetry. The modified zeolite also includes: isolated terminal primary amine functionalities bonded to silicon atoms of the microporous framework; or silazane functionalities, wherein the nitrogen atom of the silazane bridges two silicon atoms of the microporous framework; or both.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a gate stack over a substrate. The substrate has a base and a multilayer structure over the base, and the gate stack wraps around the multilayer structure. The method includes partially removing the multilayer structure, which is not covered by the gate stack. The multilayer structure remaining under the gate stack forms a multilayer stack, and the multilayer stack includes a sacrificial layer and a channel layer over the sacrificial layer. The method includes partially removing the sacrificial layer to form a recess in the multilayer stack. The method includes forming an inner spacer layer in the recess and a bottom spacer over a sidewall of the channel layer. The method includes forming a source/drain structure over the bottom spacer. The bottom spacer separates the source/drain structure from the channel layer.

Abstract: A device includes a substrate, and a first semiconductor channel over the substrate. The first semiconductor channel includes a first nanosheet of a first semiconductor material, a second nanosheet of a second semiconductor material in physical contact with a topside surface of the first nanosheet, and a third nanosheet of the second semiconductor material in physical contact with an underside surface of the first nanosheet. The first gate structure is over and laterally surrounding the first semiconductor channel, and in physical contact with the second nanosheet and the third nanosheet.

Abstract: A device includes a substrate, and a first semiconductor channel over the substrate. The first semiconductor channel includes a first nanosheet of a first semiconductor material, a second nanosheet of a second semiconductor material in physical contact with a topside surface of the first nanosheet, and a third nanosheet of the second semiconductor material in physical contact with an underside surface of the first nanosheet. The first gate structure is over and laterally surrounding the first semiconductor channel, and in physical contact with the second nanosheet and the third nanosheet.

Abstract: A cable arrangement mechanism is provided, which is disposed inside the housing of an electronic device. The cable arrangement mechanism includes a first tube, a second tube, and a plurality of first resilient elements. The first tube includes a first base, a first extension connected to the first base and extending from a first inner surface, and a first extrusion connected to the first base and extending from a first outer surface. The second tube includes a second base, a second extension connected to the second base and extending from a second inner surface, and a second extrusion connected to the second base and extending from a second outer surface. The first resilient elements respectively connect the first extrusion and the second extrusion to the housing, so that the first tube and the second tube are rotatably connected to the housing.

Abstract: Multi-gate devices and methods for fabricating such are disclosed herein. An exemplary method includes forming a gate dielectric layer around first channel layers in a p-type gate region and around second channel layers in an n-type gate region. Sacrificial features are formed between the second channel layers in the n-type gate region. A p-type work function layer is formed over the gate dielectric layer in the p-type gate region and the n-type gate region. After removing the p-type work function layer from the n-type gate region, the sacrificial features are removed from between the second channel layers in the n-type gate region. An n-type work function layer is formed over the gate dielectric layer in the n-type gate region. A metal fill layer is formed over the p-type work function layer in the p-type gate region and the n-type work function layer in the n-type gate region.

Abstract: Methods for processing a hydrocarbon feedstock may include cracking at least a portion of the hydrocarbon feedstock by contacting the hydrocarbon feedstock with a modified zeolite in the presence of hydrogen to form an intermediate cracked product and steam cracking at least a portion of the intermediate cracked product to form a steam cracked product. The intermediate cracked product may include at least 30 wt. % of one or more linear alkanes. The modified zeolite may include a microporous framework. The microporous framework may include at least silicon atoms and oxygen atoms. The modified zeolite also includes a plurality of Group 4-6 metal atoms each bonded to four bridging oxygen atoms, wherein each of the bridging oxygen atoms bonded to the Group 4-6 metal atoms bridges one of the plurality of the Group 4-6 metal atoms and a silicon atom of the microporous framework.

Abstract: Modified zeolites may include a microporous framework including a plurality of micropores having diameters of less than or equal to 2 nm. The microporous framework may include at least silicon atoms and oxygen atoms. The modified zeolite may include a plurality of mesopores having diameters of greater than 2 nm and less than or equal to 50 nm, wherein the plurality of mesopores are ordered with cubic symmetry. The modified zeolite may include a plurality of titanium atoms each bonded to four bridging oxygen atoms, wherein each of the bridging oxygen atoms bonded to the titanium atoms bridges one of the plurality of the titanium atoms and a silicon atom of the microporous framework.

Abstract: A semiconductor device including a first oxide definition (OD) strip doped by a first-type dopant in a first doping region defining an active region of a first Metal-Oxide Semiconductor (MOS); a second OD strip doped by a second-type dopant in a second doping region and a third doping region, the second doping region defining an active region of a second MOS and the third doping region defining a body terminal of the first MOS, wherein the second OD is parallel to the first OD strip; and a first dummy OD strip, wherein a boundary between the second doping region and the third doping region is formed over the first dummy OD strip; wherein the first-type dopant is different from the second-type dopant.

Abstract: A functionalized fibrous hierarchical zeolite includes a framework comprising aluminum atoms, silicon atoms, and oxygen atoms, the framework further comprising a plurality of micropores and a plurality of mesopores. The functionalized fibrous hierarchical zeolite is functionalized with at least one amine. A plurality of nanoparticles comprising platinum are immobilized on the framework.

Abstract: A memory device is provided in various embodiments. The memory device, in those embodiments, has an ovonic threshold switching (OTS) selector comprising multiple layers of OTS materials to achieve a low leakage current and as well as relatively low threshold voltage for the OTS selector. The multiple layers can have at least one layer of low bandgap OTS material and at least one layer of high bandgap OTS material.