Patents by Inventor Kuo-Wei Tseng
Kuo-Wei Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250037679Abstract: Described herein is a system and method for calculating variable refresh rate (VRR) flicker of a display used for information handling systems. VRR display data is provided to the display which generates a raw optical waveform. The raw optical waveform is captured by an optical sensor. The captured raw optical waveform is weighted using an inverse Fast Fourier Transform from a Temporal Contrast Sensitivity Function (TCSF). Calculating the flicker value of the weighted optical waveform over a defined moving window is performed. The flicker average and flicker maximum of the flicker value is used to determine a VRR flicker value.Type: ApplicationFiled: July 25, 2023Publication date: January 30, 2025Applicant: Dell Products L.P.Inventors: Kuo-Wei Tseng, Hong-Ji Huang, Yu-Chen Liu
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Patent number: 12211462Abstract: Described herein is a system and method for calculating variable refresh rate (VRR) flicker of a display used for information handling systems. VRR display data is provided to the display which generates a raw optical waveform. The raw optical waveform is captured by an optical sensor. The captured raw optical waveform is weighted using an inverse Fast Fourier Transform from a Temporal Contrast Sensitivity Function (TCSF). Calculating the flicker value of the weighted optical waveform over a defined moving window is performed. The flicker average and flicker maximum of the flicker value is used to determine a VRR flicker value.Type: GrantFiled: July 25, 2023Date of Patent: January 28, 2025Assignee: Dell Products L.P.Inventors: Kuo-Wei Tseng, Hong-Ji Huang, Yu-Chen Liu
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Patent number: 12185988Abstract: The present disclosure provides an interspinous process device. The interspinous process device may include a main body having a cavity formed therein, the main body being configured to be disposed between the two adjacent spinous processes; and a spacer configured to be arranged in the cavity of the main body. When the main body is disposed between the two adjacent spinous processes and the spacer is arranged in the cavity of the main body, a volume of the cavity may be greater than a volume of the spacer, a height of the cavity may be equal to a height of the spacer, and a width of the cavity may be greater than a width of the spacer.Type: GrantFiled: June 7, 2022Date of Patent: January 7, 2025Assignee: BAUI Biotech Co., Ltd.Inventors: Yu-Sheng Lin, Kuo-Wei Tseng, Chiung-Chyi Shen, Meng-Yin Yang
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Publication number: 20240347491Abstract: The present application discloses a bump structure and a manufacturing method thereof. The bump structure comprises a first bump layer disposed on a chip and a second bump layer disposed on the first bump layer, and the hardness of the first and second bump layers are different, and both materials of the first and second bump layers are the same conductive material. Thus, when the chip is connected with a substrate through the bump structure and a force applied to the bump structure, it is not easily to cause that the bump structure makes a damage on the chip, and the bump structure according to the present invention is to enhance the structure characteristic and prevented from damaging.Type: ApplicationFiled: May 26, 2023Publication date: October 17, 2024Inventor: Kuo-Wei Tseng
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Patent number: 12093473Abstract: An information handling system stylus transmits a wireless signal at a writing tip to enhance touch detection of the writing tip by a touchscreen display and receives wireless signals from the touchscreen display at a receiving antenna. To enhance control of wireless energy distributed at the writing tip, the receiving antenna is selectively coupled to the writing tip, such as by transitioning from a float of the receiving antenna to an interface with the stylus power source at transmit by the writing tip. Charge at the receiving antenna helps to shape the energy distribution from the writing tip, such as to match the energy distribution of other styluses in use at the touchscreen display.Type: GrantFiled: July 31, 2023Date of Patent: September 17, 2024Assignee: Dell Products L.P.Inventors: Kuo-Wei Tseng, How-Lan Eric Lin, Yu-Chen Liu, Chi-Fong Lee, Wei-Chou Chen
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Patent number: 12078532Abstract: An information handling system includes a display panel having an active area that generates visual images and an inactive area disposed outside the active area. The inactive area having an alignment mark that is invisible to a naked eye.Type: GrantFiled: October 7, 2022Date of Patent: September 3, 2024Assignee: Dell Products L.P.Inventors: Hong-Ji Huang, Yu-Chen Liu, Kuo-Wei Tseng, Chun-Wei Huang, Chi-Fong Lee
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Publication number: 20240118135Abstract: An information handling system includes a display panel having an active area that generates visual images and an inactive area disposed outside the active area. The inactive area having an alignment mark that is invisible to a naked eye.Type: ApplicationFiled: October 7, 2022Publication date: April 11, 2024Inventors: Hong-Ji Huang, Yu-Chen Liu, Kuo-Wei Tseng, Chun-Wei Huang, Chi-Fong Lee
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Publication number: 20240023369Abstract: A display includes an imaging device with a light source providing a first light emission and a second light emission, and an organic light-emitting diode panel proximate to the light source, wherein the first light emission leaks at an active area of the display device. A light emission barrier blocks the first light emission from leaking at the active area of the display while permitting the second light emission through the imaging device.Type: ApplicationFiled: July 13, 2022Publication date: January 18, 2024Inventors: Yu-Chen Liu, Hong-Ji Huang, Kuo-Wei Tseng
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Publication number: 20230376132Abstract: An information handling system stylus transmits a wireless signal at a writing tip to enhance touch detection of the writing tip by a touchscreen display and receives wireless signals from the touchscreen display at a receiving antenna. To enhance control of wireless energy distributed at the writing tip, the receiving antenna is selectively coupled to the writing tip, such as by transitioning from a float of the receiving antenna to an interface with the stylus power source at transmit by the writing tip. Charge at the receiving antenna helps to shape the energy distribution from the writing tip, such as to match the energy distribution of other styluses in use at the touchscreen display.Type: ApplicationFiled: July 31, 2023Publication date: November 23, 2023Applicant: Dell Products L.P.Inventors: Kuo-Wei Tseng, How-Lan Eric Lin, Yu-Chen Liu, Chi-Fong Lee, Wei-Chou Chen
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Patent number: 11797111Abstract: An information handling system stylus transmits a wireless signal at a writing tip to enhance touch detection of the writing tip by a touchscreen display and receives wireless signals from the touchscreen display at a receiving antenna. To enhance control of wireless energy distributed at the writing tip, the receiving antenna is selectively coupled to the writing tip, such as by transitioning from a float of the receiving antenna to an interface with the stylus power source at transmit by the writing tip. Charge at the receiving antenna helps to shape the energy distribution from the writing tip, such as to match the energy distribution of other styluses in use at the touchscreen display.Type: GrantFiled: March 30, 2021Date of Patent: October 24, 2023Assignee: Dell Products L.P.Inventors: Kuo-Wei Tseng, How-Lan Eric Lin, Yu-Chen Liu, Chi-Fong Lee, Wei-Chou Chen
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Publication number: 20230270474Abstract: The present disclosure provides an interspinous process device. The interspinous process device may include a main body having a cavity formed therein, the main body being configured to be disposed between the two adjacent spinous processes; and a spacer configured to be arranged in the cavity of the main body. When the main body is disposed between the two adjacent spinous processes and the spacer is arranged in the cavity of the main body, a volume of the cavity may be greater than a volume of the spacer, a height of the cavity may be equal to a height of the spacer, and a width of the cavity may be greater than a width of the spacer.Type: ApplicationFiled: June 7, 2022Publication date: August 31, 2023Inventors: YU-SHENG LIN, KUO-WEI TSENG, CHIUNG-CHYI SHEN, MENG-YIN YANG
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Patent number: 11694983Abstract: The present invention provides a test pad structure of chip, which comprises a plurality of first internal test pads, a plurality of second internal test pads, a plurality of first extended test pads, and a plurality of second extended test pads. The first internal test pads and the second internal test pads are disposed in a chip. The second internal test pads and the first internal test pads are spaced by a distance. The first extended test pads are connected with the first internal test pads. The second extended test pads are connected with the second internal test pads. The first extended test pads and the second extended test pads may increase the contact area to be contacted by probes. Signals or power are transmitted to the first internal test pads and the second internal test pads via the first extended test pads and the second extended test pads for the probes to test the chip.Type: GrantFiled: August 2, 2021Date of Patent: July 4, 2023Assignee: Sitronix Technology CorporationInventors: Kuo-Wei Tseng, Po-Chi Chen
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Patent number: 11662861Abstract: An information handling system presents visual images at a display that includes a display panel having a capacitive touch detection surface supported by an indium tin oxide layer disposed between a front layer, such as polarizer, and a display cell. To prevent excessive charge build up associated with the capacitive touch detection surface, a conductive ink is applied at the display panel perimeter and interfaced with a ground at the rear side of the display panel. In one example embodiment, a non-conductive ink insulates the conductive ink from the display panel except as desired to transfer excess charge from the indium tin oxide layer. The conductive ink may interface directly with the indium tin oxide layer or indirectly through a second non-conductive ink having greater conductivity than the insulative non-conductive ink.Type: GrantFiled: April 29, 2022Date of Patent: May 30, 2023Assignee: Dell Products L.P.Inventors: Kuo-Wei Tseng, Hong-Ji Huang, Yu-Chen Liu, Chun-Wei Huang, Chi-Fong Lee
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Patent number: 11663367Abstract: An information handling display presents visual images in a privacy mode that manages visual image brightness with a local processing resource when a predetermined condition is detected, such as multiple individuals in the display field of view. For example, an information handling system provides visual information to a display timing controller that includes a pulse width modulation signal to command display backlight brightness. When in a privacy mode, the timing controller or another processing resource modifies the pulse width modulation signal to command a predetermined reduced brightness, such as in a range of 30 to 50 nits of reduced brightness.Type: GrantFiled: February 25, 2022Date of Patent: May 30, 2023Assignee: Dell Products L.P.Inventors: Kuo-Wei Tseng, Yu-Chen Liu, Dan Odell Boice, Hong-Ji Huang, Chi-Fong Lee
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Patent number: 11612624Abstract: This disclosure provides a method of protecting a subject for exercise that prevents an exercise-related harmful effect and reducing exercise fatigue in the subject to thereby enhance physical performance and promote anti-fatigue and anti-inflammatory effects in the subject.Type: GrantFiled: January 22, 2020Date of Patent: March 28, 2023Assignee: BENED BIOMEDICAL CO., LTD.Inventors: Ying-Chieh Tsai, Kuo-Wei Tseng, Chih-Chieh Hsu, Chien-Chen Wu
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Publication number: 20220336398Abstract: The present invention provides a bump structure of chip disposed on a surface of a chip and comprises a plurality of connecting-bump sets. Each connecting-bump set includes a first connecting hum and a second connecting hump. The first connecting bump and the second connecting bump include corresponding blocking structures. While disposing the chip on a board member, the blocking structure of the first connecting bump and the blocking structure of the second connecting bump block the conductive medium and retard the flow of the conductive medium. The conductive medium is forced to flow between the first connecting bump and the second connecting bump and thus preventing the conductive particles in the conductive medium from leaving the surfaces of the connecting bumps. In addition, there is a flow channel between the first and second connecting bumps. One or more width of the flow channel is between 0.1 ?m and 8 ?m.Type: ApplicationFiled: April 6, 2022Publication date: October 20, 2022Inventors: Kuo-Wei TSENG, Po-Chi CHEN
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Publication number: 20220317784Abstract: An information handling system stylus transmits a wireless signal at a writing tip to enhance touch detection of the writing tip by a touchscreen display and receives wireless signals from the touchscreen display at a receiving antenna. To enhance control of wireless energy distributed at the writing tip, the receiving antenna is selectively coupled to the writing tip, such as by transitioning from a float of the receiving antenna to an interface with the stylus power source at transmit by the writing tip. Charge at the receiving antenna helps to shape the energy distribution from the writing tip, such as to match the energy distribution of other styluses in use at the touchscreen display.Type: ApplicationFiled: March 30, 2021Publication date: October 6, 2022Applicant: Dell Products L.P.Inventors: Kuo-Wei Tseng, How-Lan Eric Lin, Yu-Chen Liu, Chi-Fong Lee, Wei-Chou Chen
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Publication number: 20220037275Abstract: The present invention provides a flow guiding structure of chip, which comprises at least one flow guiding member disposed on a surface of a chip and adjacent to a plurality of connecting bumps disposed on the surface of the chip. When the chip is disposed on a board member, the at least one flow guiding member may guide the conductive medium on the surface of the chip to flow toward the connecting bumps and drive a plurality of conductive particles of the conductive medium to move toward the connecting bumps and thus increasing the number of the conductive particles on the surfaces of the connecting bumps. Alternatively, the flow guiding member may retard the flow of the conductive medium for avoiding the conductive particles from leaving the surfaces of the connecting bumps and thus preventing reduction of the number of the conductive particles on the surfaces of the connecting bumps.Type: ApplicationFiled: August 2, 2021Publication date: February 3, 2022Inventors: KUO-WEI TSENG, PO-CHI CHEN
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Publication number: 20220037218Abstract: The present invention provides a test pad structure of chip, which comprises a plurality of first internal test pads, a plurality of second internal test pads, a plurality of first extended test pads, and a plurality of second extended test pads. The first internal test pads and the second internal test pads are disposed in a chip. The second internal test pads and the first internal test pads are spaced by a distance. The first extended test pads are connected with the first internal test pads. The second extended test pads are connected with the second internal test pads. The first extended test pads and the second extended test pads may increase the contact area to be contacted by probes. Signals or power are transmitted to the first internal test pads and the second internal test pads via the first extended test pads and the second extended test pads for the probes to test the chip.Type: ApplicationFiled: August 2, 2021Publication date: February 3, 2022Inventors: KUO-WEI TSENG, PO-CHI CHEN
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Patent number: 11217508Abstract: The present invention discloses a lead structure of the circuit, which comprises a first lead and a second lead. The first lead includes a first bump connecting part and a first lead segment. The first lead segment is connected to the first bump connecting part. The width of the first lead segment is smaller than the width of the first bump connecting part. The second lead is adjacent to the first lead and there is a lead gap therebetween. The second lead also includes a second bump connecting part and a first lead segment. The first lead segment of the second lead is connected to the second bump connecting part. The second bump connecting part and the first bump connecting part are arranged staggeredly. The second bump connecting part is adjacent to the first lead segment of the first lead.Type: GrantFiled: October 16, 2018Date of Patent: January 4, 2022Assignee: Sitronix Technology Corp.Inventors: Kuo-Wei Tseng, Po-Chi Chen, Jui-Hsuan Cheng