Patents by Inventor Kuo-Wei Wu

Kuo-Wei Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978664
    Abstract: A method includes forming a first conductive feature over a semiconductor substrate, forming an ILD layer over the first conductive feature, patterning the ILD layer to form a trench, and forming a conductive layer over the patterned ILD layer to fill the trench. The method further includes polishing the conductive layer to form a via contact configured to interconnect the first conductive feature with a second conductive feature, where polishing the conductive layer exposes a top surface of the ILD layer, polishing the exposed top surface of the ILD layer, such that a top portion of the via contact protrudes from the exposed top surface of the ILD layer, and forming the second conductive feature over the via contact, such that the top portion of the via contact extends into the second conductive feature.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pang-Sheng Chang, Chao-Hsun Wang, Kuo-Yi Chao, Fu-Kai Yang, Mei-Yun Wang, Li-Chieh Wu, Chun-Wei Hsu
  • Publication number: 20240133639
    Abstract: A low pressure drop automotive liquid-cooling heat dissipation plate and an enclosed automotive liquid-cooling cooler having the same are provided. The low pressure drop automotive liquid-cooling heat dissipation plate includes a heat dissipation plate body and three fin sets. The heat dissipation plate body has a first heat dissipation surface and a second heat dissipation surface that are opposite to each other. The first heat dissipation surface is in contact with three traction inverter power component sets, and the second heat dissipation surface is in contact with a cooling fluid. Three heat dissipation regions that are spaced equidistantly apart from each other and that have a same size are defined on the second heat dissipation surface along a flow direction of the cooling fluid, and respectively correspond to three projection areas formed by projecting three traction inverter power component sets on the second heat dissipation surface.
    Type: Application
    Filed: October 20, 2022
    Publication date: April 25, 2024
    Inventors: CHUN-LI HSIUNG, KUO-WEI LEE, CHIEN-CHENG WU, CHUN-LUNG WU
  • Patent number: 11965702
    Abstract: A low pressure drop automotive liquid-cooling heat dissipation plate and an enclosed automotive liquid-cooling cooler having the same are provided. The low pressure drop automotive liquid-cooling heat dissipation plate includes a heat dissipation plate body and three fin sets. The heat dissipation plate body has a first heat dissipation surface and a second heat dissipation surface that are opposite to each other. The first heat dissipation surface is in contact with three traction inverter power component sets, and the second heat dissipation surface is in contact with a cooling fluid. Three heat dissipation regions that are spaced equidistantly apart from each other and that have a same size are defined on the second heat dissipation surface along a flow direction of the cooling fluid, and respectively correspond to three projection areas formed by projecting three traction inverter power component sets on the second heat dissipation surface.
    Type: Grant
    Filed: October 21, 2022
    Date of Patent: April 23, 2024
    Assignee: AMULAIRE THERMAL TECHNOLOGY, INC.
    Inventors: Chun-Li Hsiung, Kuo-Wei Lee, Chien-Cheng Wu, Chun-Lung Wu
  • Publication number: 20240116356
    Abstract: A vehicle water-cooling heat sink plate having fin sets with different fin pitch distances is provided. The vehicle water-cooling heat sink plate includes a heat-dissipating plate body and three fin sets. The heat-dissipating plate body has a first heat-dissipating surface and a second heat-dissipating surface that are opposite to each other, the first heat-dissipating surface is used for contacting three traction inverter power component sets, and the second heat-dissipating surface is used for contacting a cooling fluid. The second heat-dissipating surface of the heat-dissipating plate body along a flow direction of the cooling fluid is divided into three heat-dissipating areas which are spaced apart from each other and have the same size, and the three heat-dissipating areas respectively correspond to three projection areas that are respectively generated by the three traction inverter power component sets.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 11, 2024
    Inventors: KUO-WEI LEE, CHUN-LI HSIUNG, CHIEN-CHENG WU, CHUN-LUNG WU
  • Publication number: 20240120313
    Abstract: A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive ring-like structure over and electrically insulated from the chip. The conductive ring-like structure surrounds a central region of the chip. The chip package structure includes a first solder structure over the conductive ring-like structure. The first solder structure and the conductive ring-like structure are made of different materials.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Sheng-Yao YANG, Ling-Wei LI, Yu-Jui WU, Cheng-Lin HUANG, Chien-Chen LI, Lieh-Chuan CHEN, Che-Jung CHU, Kuo-Chio LIU
  • Publication number: 20240121913
    Abstract: A vehicle water-cooling heat sink plate having fin sets with different surface areas is provided. The vehicle water-cooling heat sink plate includes a heat-dissipating plate body and three fin sets. The heat-dissipating plate body has a first heat-dissipating surface and a second heat-dissipating surface that are opposite to each other, the first heat-dissipating surface is used for contacting three traction inverter power component sets, and the second heat-dissipating surface is used for contacting a cooling fluid. The second heat-dissipating surface of the heat-dissipating plate body along a flow direction of the cooling fluid is divided into three heat-dissipating areas which are spaced apart from each other and have the same size, and the three heat-dissipating areas respectively correspond to three projection areas that are respectively generated by the three traction inverter power component sets.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 11, 2024
    Inventors: CHUN-LI HSIUNG, KUO-WEI LEE, CHUN-LUNG WU, CHIEN-CHENG WU
  • Publication number: 20240113237
    Abstract: The present disclosure provides a semiconductor structure and a method of manufacturing the same. The semiconductor structure includes a sensing device, a solar cell, and an interconnecting structure. The solar cell is disposed above the sensing device and is electrically connected to the sensing device. The interconnecting structure is disposed between the sensing device and the solar cell and has a first surface facing the solar cell and a second surface facing the sensing devices. The interconnecting structure comprises a first energy storage component and a second energy storage component. The first energy storage component is disposed closer to the first surface of the interconnecting structure than the second energy storage component.
    Type: Application
    Filed: January 10, 2023
    Publication date: April 4, 2024
    Inventors: FENG-CHIEN HSIEH, YUN-WEI CHENG, KUO-CHENG LEE, CHENG-MING WU, PING KUAN CHANG
  • Publication number: 20240096923
    Abstract: The image sensing structure includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes at least one first unit. The at least one first unit includes a plurality of first interconnects adjacent to the top side of the first semiconductor device, a row selector, and an analog-to-digital converter (ADC) connected to the row selectors. The second semiconductor device includes at least one second unit. The at least one second unit includes a photodiode facing the top side of the second semiconductor device. The photodiode is configured to receive the light incident on the top side of the second semiconductor device. The top side of the first semiconductor device is bonded to the bottom side of the second semiconductor device.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 21, 2024
    Inventors: FENG-CHIEN HSIEH, YUN-WEI CHENG, WEI-LI HU, KUO-CHENG LEE, CHENG-MING WU
  • Publication number: 20240084455
    Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 14, 2024
    Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Publication number: 20240090234
    Abstract: A magnetoresistive random access memory (MRAM) includes a first transistor and a second transistor on a substrate, a source line coupled to a first source/drain region of the first transistor, and a first metal interconnection coupled to a second source/drain region of the first transistor. Preferably, the first metal interconnection is extended to overlap the first transistor and the second transistor and the first metal interconnection further includes a first end coupled to the second source/drain region of the first transistor and a second end coupled to a magnetic tunneling junction (MTJ).
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Hsing Lee, Sheng-Yuan Hsueh, Te-Wei Yeh, Chien-Liang Wu
  • Publication number: 20240079422
    Abstract: A pixel array includes octagon-shaped pixel sensors and a combination of visible light pixel sensors (e.g., red, green, and blue pixel sensors) and near infrared (NIR) pixel sensors. The color information obtained by the visible light pixel sensors and the luminance obtained by the NIR pixel sensors may be combined to increase the low-light performance of the pixel array, and to allow for low-light color images in low-light applications. The octagon-shaped pixel sensors may be interspersed in the pixel array with square-shaped pixel sensors to increase the utilization of space in the pixel array, and to allow for pixel sensors in the pixel array to be sized differently. The capability to accommodate different sizes of visible light pixel sensors and NIR pixel sensors permits the pixel array to be formed and/or configured to satisfy various performance parameters.
    Type: Application
    Filed: April 27, 2023
    Publication date: March 7, 2024
    Inventors: Feng-Chien HSIEH, Yun-Wei CHENG, Kuo-Cheng LEE, Cheng-Ming WU
  • Patent number: 11892282
    Abstract: A protective film thickness measuring method includes a step of applying light to a top surface of a wafer in a state in which no protective film is formed and measuring a first reflection intensity of the light reflected from the top surface, a step of forming the protective film including a light absorbing material, a step of irradiating the protective film with exciting light of a wavelength at which the light absorbing material fluoresces and measuring a second reflection intensity including fluorescence of the protective film and the light reflected from the top surface, and a step of excluding reflection intensity of patterns formed on the top surface, by subtracting the measured first reflection intensity from the measured second reflection intensity, and calculating fluorescence intensity of the protective film.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: February 6, 2024
    Assignee: DISCO CORPORATION
    Inventors: Hiroto Yoshida, Nobuyasu Kitahara, Kuo Wei Wu, Kunimitsu Takahashi, Naoki Murazawa, Joel Koerwer
  • Publication number: 20230307231
    Abstract: Various embodiments of the present application are directed towards a semiconductor-on-insulator (SOI) substrate. The SOI substrate includes a handle substrate; a device layer overlying the handle substrate; and an insulator layer separating the handle substrate from the device layer. The insulator layer meets the device layer at a first interface and meets the handle substrate at a second interface. The insulator layer comprises a getter material having a getter concentration profile. The handle substrate contains getter material and has a handle getter concentration profile. The handle getter concentration profile has a peak at the second interface and a gradual decline beneath the second interface until reaching a handle getter concentration.
    Type: Application
    Filed: June 2, 2023
    Publication date: September 28, 2023
    Inventors: Cheng-Ta Wu, Chia-Ta Hsieh, Kuo Wei Wu, Yu-Chun Chang, Ying Ling Tseng
  • Patent number: 11705328
    Abstract: Various embodiments of the present application are directed towards a semiconductor-on-insulator (SOI) substrate. The SOI substrate includes a handle substrate; a device layer overlying the handle substrate; and an insulator layer separating the handle substrate from the device layer. The insulator layer meets the device layer at a first interface and meets the handle substrate at a second interface. The insulator layer comprises a getter material having a getter concentration profile. The handle substrate contains getter material and has a handle getter concentration profile. The handle getter concentration profile has a peak at the second interface and a gradual decline beneath the second interface until reaching a handle getter concentration.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: July 18, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Ta Wu, Chia-Ta Hsieh, Kuo Wei Wu, Yu-Chun Chang, Ying Ling Tseng
  • Publication number: 20220373321
    Abstract: A protective film thickness measuring method includes a step of applying light to a top surface of a wafer in a state in which no protective film is formed and measuring a first reflection intensity of the light reflected from the top surface, a step of forming the protective film including a light absorbing material, a step of irradiating the protective film with exciting light of a wavelength at which the light absorbing material fluoresces and measuring a second reflection intensity including fluorescence of the protective film and the light reflected from the top surface, and a step of excluding reflection intensity of patterns formed on the top surface, by subtracting the measured first reflection intensity from the measured second reflection intensity, and calculating fluorescence intensity of the protective film.
    Type: Application
    Filed: May 16, 2022
    Publication date: November 24, 2022
    Inventors: Hiroto YOSHIDA, Nobuyasu KITAHARA, Kuo Wei WU, Kunimitsu TAKAHASHI, Naoki MURAZAWA, Joel KOERWER
  • Publication number: 20220216053
    Abstract: Various embodiments of the present application are directed towards a semiconductor-on-insulator (SOI) substrate. The SOI substrate includes a handle substrate; a device layer overlying the handle substrate; and an insulator layer separating the handle substrate from the device layer. The insulator layer meets the device layer at a first interface and meets the handle substrate at a second interface. The insulator layer comprises a getter material having a getter concentration profile. The handle substrate contains getter material and has a handle getter concentration profile. The handle getter concentration profile has a peak at the second interface and a gradual decline beneath the second interface until reaching a handle getter concentration.
    Type: Application
    Filed: March 22, 2022
    Publication date: July 7, 2022
    Inventors: Cheng-Ta Wu, Chia-Ta Hsieh, Kuo Wei Wu, Yu-Chun Chang, Ying Ling Tseng
  • Publication number: 20220118547
    Abstract: A laser processing apparatus includes a laser beam applying unit for applying a laser beam to a workpiece, an image capturing unit for producing a captured image of the workpiece that includes a captured image of light emitted from the workpiece when the laser beam is applied to the workpiece by the laser beam applying unit, and a control unit. The laser beam applying unit includes a laser oscillator for emitting a laser beam and a condensing lens for converging the laser beam onto the workpiece. The control unit includes a determining section for determining a state of the laser beam applied to the workpiece, on the basis of the shape of the captured image of the light that is included in the captured image of the workpiece.
    Type: Application
    Filed: October 4, 2021
    Publication date: April 21, 2022
    Inventors: Hironari OHKUBO, Yuta YOSHIDA, Kuo Wei WU, Keita OBARA, Shinya HONDA
  • Patent number: 11289330
    Abstract: Various embodiments of the present application are directed towards a method for forming a semiconductor-on-insulator (SOI) substrate with a thick device layer and a thick insulator layer. In some embodiments, the method includes forming an insulator layer covering a handle substrate, and epitaxially forming a device layer on a sacrificial substrate. The sacrificial substrate is bonded to a handle substrate, such that the device layer and the insulator layer are between the sacrificial and handle substrates, and the sacrificial substrate is removed. The removal includes performing an etch into the sacrificial substrate until the device layer is reached. Because the device layer is formed by epitaxy and transferred to the handle substrate, the device layer may be formed with a large thickness. Further, because the epitaxy is not affected by the thickness of the insulator layer, the insulator layer may be formed with a large thickness.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: March 29, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Ta Wu, Chia-Ta Hsieh, Kuo Wei Wu, Yu-Chun Chang, Ying Ling Tseng
  • Patent number: 11228717
    Abstract: A hand-held image-capturing electronic device with ability to compensate for unstable rotation and images during 360-degree panoramic captures includes a display screen, a first lens unit, a second lens unit, and a third lens unit. The first lens unit and the second lens unit are positioned on opposing surfaces, the third lens unit is independently rotatable on the electronic device and can cooperate with the first lens unit and the second lens unit to capture images which are refined and synthesized together by the device. A method for capturing such images with such device is also disclosed.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: January 18, 2022
    Assignee: Chiun Mai Communication Systems, Inc.
    Inventor: Kuo-Wei Wu
  • Patent number: 11184014
    Abstract: Disclosed is a voltage-controlled oscillator (VCO) capable of providing an effective high VCO gain against slow change of an input voltage caused by the variation of manufacturing processes, temperature, voltage, etc. and providing an effective low VCO gain against rapid change of the input voltage for reducing jitter. The VCO includes: an input circuit generating an input current according to an input voltage; a first current supply circuit generating a first output current according to the input current; a second current supply circuit generating a second output current according to the input current; a filter coupled to the input circuit and the second current supply circuit and configured to slow down the influence caused by the variation of the input current on the second current supply circuit; and an oscillating circuit generating an output clock according to the first output current and the second output current.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: November 23, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Sung-Lin Tsai, Kuo-Wei Wu, Jian-Ru Lin