Abstract: A semiconductor die is provided. The semiconductor die includes a substrate having a front surface, a rear surface opposite to the front surface, and a sidewall connected between the front surface and the rear surface. The sidewall includes a first primary segment immediately connected to the front surface, a second primary segment immediately connected to the rear surface, and a middle segment between the first primary segment and the second primary segment. The slope of the second primary segment is less than the slope of the first primary segment, and the slope of the middle segment is less than the slope of the second primary segment. Each of the first primary segment, the second primary segment, and the middle segment is a flat surface having a slope greater than 0 degrees relative to a line parallel to the front surface of the substrate.

Abstract: A method for sawing a semiconductor wafer is provided. The method includes sawing the semiconductor wafer with a first dicing blade to form a first opening. The semiconductor wafer includes a dicing tape and a substrate attached to the dicing tape. The first opening is formed in the upper portion of the substrate. The method also includes sawing the semiconductor wafer with a second dicing blade from the first opening to form a second opening under the first opening and in the middle portion of the substrate. The method further includes sawing the semiconductor wafer with a third dicing blade from the second opening to form a third opening under the second opening and penetrating the lower portion of the substrate, so that the semiconductor wafer is divided into two dies. The first dicing blade, the second dicing blade, and the third dicing blade have different widths.

Abstract: A chip package structure includes an interposer structure that contains a package-side redistribution structure, an interposer core assembly, and a die-side redistribution structure. The interposer core assembly includes at least one silicon substrate interposer, and each of the at least one silicon substrate interposer includes a respective silicon substrate, a respective set of through-silicon via (TSV) structures vertically extending through the respective silicon substrate, a respective set of interconnect-level dielectric layers embedding a respective set of metal interconnect structures, and a respective set of metal bonding structures that are electrically connected to the die-side redistribution structure. The chip package structure includes at least two semiconductor dies that are attached to the die-side redistribution structure, and an epoxy molding compound (EMC) multi-die frame that laterally encloses the at least two semiconductor dies.

Abstract: A light-emitting module structure includes a substrate, a plurality of light-emitting diodes (LEDs) disposed on the substrate, and a light-guiding layer covering the light-emitting diodes. The light-guiding layer has an upper surface, the upper surface has a plurality of recesses, and the recesses are above the light-emitting diodes or between the light-emitting diodes. This light-emitting module structure can improve the brightness and uniformity of the light-emitting module.

Abstract: A light-emitting module structure includes a substrate, a plurality of light-emitting diodes (LEDs) disposed on the substrate, and a light-guiding layer covering the light-emitting diodes. The light-guiding layer has an upper surface, the upper surface has a plurality of recesses, and the recesses are above the light-emitting diodes or between the light-emitting diodes. This light-emitting module structure can improve the brightness and uniformity of the light-emitting module.

Abstract: A light-emitting module structure includes a substrate, a plurality of light-emitting diodes (LEDs) disposed on the substrate, and a light-guiding layer covering the light-emitting diodes. The light-guiding layer has an upper surface, the upper surface has a plurality of recesses, and the recesses are above the light-emitting diodes or between the light-emitting diodes. This light-emitting module structure can improve the brightness and uniformity of the light-emitting module.

Abstract: A light-emitting module structure includes a substrate, a plurality of light-emitting diodes (LEDs) disposed on the substrate, and a light-guiding layer covering the light-emitting diodes. The light-guiding layer has an upper surface, the upper surface has a plurality of recesses, and the recesses are above the light-emitting diodes or between the light-emitting diodes. This light-emitting module structure can improve the brightness and uniformity of the light-emitting module.

Abstract: An electronic device package includes a carrying board, an electronic device, a first insulating layer, and a barrier layer. The carrying board includes a central area, an inner edge area, and an outer edge area. The inner edge area is located between the central area and the outer edge area. The electronic device is located in the central area. The first insulating layer is located on the carrying board and overlapped with the electronic device and extends from the central area to the inner edge area. The barrier layer is located on the carrying board. Here, the barrier layer includes a sidewall contact portion and an extending portion. The sidewall contact portion surrounds a side surface of the first insulating layer, and the extending portion extends from the sidewall contact portion to the outer edge area in a direction away from the first insulating layer.

Abstract: A pixel structure includes data lines disposed along a first direction, scan lines disposed along a second direction and pixel units periodically disposed along the first and the second directions. In a first pixel unit, a first switch element is coupled to a first scan line and a first data line, the second switch element is coupled to the first scan line, and a third switch element is coupled to the first scan line. In a second pixel unit, a fourth switch element is coupled to a second scan line, the first data line and the second switch element, and a fifth switch element is electrically coupled to the second scan line and the third switch element. In a third pixel unit, a sixth switch element is coupled to a third scan line, the first data line and the fifth switch element.

Abstract: In some embodiments, a maintenance apparatus is provided for maintaining semiconductor processing equipment. The maintenance apparatus has an articulated member having a first member with a handle engagement portion and a second member with a first tool engagement portion. The first member is rotationally coupled to the first member about an articulation axis. A first tool member in selective engagement with the first tool engagement portion of the second member.

Abstract: A pixel structure includes data lines disposed along a first direction, scan lines disposed along a second direction and pixel units periodically disposed along the first and the second directions. In a first pixel unit, a first switch element is coupled to a first scan line and a first data line, the second switch element is coupled to the first scan line, and a third switch element is coupled to the first scan line. In a second pixel unit, a fourth switch element is coupled to a second scan line, the first data line and the second switch element, and a fifth switch element is electrically coupled to the second scan line and the third switch element. In a third pixel unit, a sixth switch element is coupled to a third scan line, the first data line and the fifth switch element.

Abstract: An electronic device package includes a carrying board, an electronic device, a first insulating layer, and a barrier layer. The carrying board includes a central area, an inner edge area, and an outer edge area. The inner edge area is located between the central area and the outer edge area. The electronic device is located in the central area. The first insulating layer is located on the carrying board and overlapped with the electronic device and extends from the central area to the inner edge area. The barrier layer is located on the carrying board. Here, the barrier layer includes a sidewall contact portion and an extending portion. The sidewall contact portion surrounds a side surface of the first insulating layer, and the extending portion extends from the sidewall contact portion to the outer edge area in a direction away from the first insulating layer.

Abstract: In some embodiments, a maintenance apparatus is provided for maintaining semiconductor processing equipment. The maintenance apparatus has an articulated member having a first member with a handle engagement portion and a second member with a first tool engagement portion. The first member is rotationally coupled to the first member about an articulation axis. A first tool member in selective engagement with the first tool engagement portion of the second member.

Abstract: A swinging bucket centrifuge rotor having a conforming bucket seat which includes a plurality of cavities evenly spaced about its vertical axis. Each has a seat portion that with an inward profile generally following the profile of a swinging bucket, subjected to centrifugal forces. A passageway extends entirely through the rotor head and includes a slot extending radially outward from the passageway, positioned so as to bifurcate the seat portion. Located between the vertical axis and the passageway is an improved hanging mechanism that reduces the likelihood of improperly mounting a swinging bucket onto the rotor. Three embodiments of the hanging mechanism are disclosed, each of which is integrally formed with the inner wall of each cavity. The hanging mechanism is positioned so that during centrifugation, the seat portion of the rotor will bear the full centrifugal force of the bucket.