Patents by Inventor Kurao Nakagawa

Kurao Nakagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8013642
    Abstract: An output drive circuit includes: a totem-pole output including: a high-side transistor (HST) with drain and source, an output stage power supply voltage applied to the drain, the source connected to the first node (N1); and a low-side transistor with source and drain, a ground voltage applied to the source, the drain connected to N1; and a bootstrap part including a capacitor supplying charge to a gate of HST when on, the charge being charged when HST is off, and one terminal of the bootstrap part connected to N1, the output drive circuit further including: a first transistor (T1) that conducts when HST is to be on, T1 connected between a drive circuit power supply voltage and the gate of HST; and a second transistor conducting when HST is to be turned on, the second transistor connected between the other terminal of the capacitor and HST gate.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: September 6, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Kurao Nakagawa
  • Patent number: 7936161
    Abstract: In a conventional bias circuit, as a power supply voltage increases, a current supplied to a bandgap reference becomes unstable due to a fluctuation of the power supply voltage, which makes it impossible for the bias circuit to perform stable bias operations in some cases. A bias circuit of the present invention has a bandgap reference, and includes a first current path supplying a drive current to the bandgap reference, and a second current path supplying a current to the bandgap reference for a predetermined period of time after power-on.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: May 3, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Kurao Nakagawa
  • Publication number: 20090315595
    Abstract: An output drive circuit includes: a totem-pole output including: a high-side transistor (HST) with drain and source, an output stage power supply voltage applied to the drain, the source connected to the first node (N1); and a low-side transistor with source and drain, a ground voltage applied to the source, the drain connected to N1; and a bootstrap part including a capacitor supplying charge to a gate of HST when on, the charge being charged when HST is off, and one terminal of the bootstrap part connected to N1, the output drive circuit further including: a first transistor (T1) that conducts when HST is to be on, T1 connected between a drive circuit power supply voltage and the gate of HST; and a second transistor conducting when HST is to be turned on, the second transistor connected between the other terminal of the capacitor and HST gate.
    Type: Application
    Filed: June 4, 2009
    Publication date: December 24, 2009
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Kurao NAKAGAWA
  • Publication number: 20080309309
    Abstract: In a conventional bias circuit, as a power supply voltage increases, a current supplied to a bandgap reference becomes unstable due to a fluctuation of the power supply voltage, which makes it impossible for the bias circuit to perform stable bias operations in some cases. A bias circuit of the present invention has a bandgap reference, and includes a first current path supplying a drive current to the bandgap reference, and a second current path supplying a current to the bandgap reference for a predetermined period of time after power-on.
    Type: Application
    Filed: June 9, 2008
    Publication date: December 18, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Kurao Nakagawa
  • Publication number: 20040164232
    Abstract: In a photocurrent-to-binary signal conversion apparatus, a light receiving element receives a light signal so that a photocurrent in response to the light signal flows through the light receiving element. An amplifier converts the photocurrent into a detection voltage. A reference voltage generating circuit offsets the detection voltage on the side of the detection voltage to generate a reference voltage. A comparator compares the detection voltage with the reference voltage to generate a binary signal in accordance with whether or not the detection voltage is higher than the reference voltage.
    Type: Application
    Filed: February 23, 2004
    Publication date: August 26, 2004
    Applicant: NEC COMPOUND SEMICONDUCTOR DEVICES, LTD.
    Inventor: Kurao Nakagawa
  • Patent number: 6154382
    Abstract: A high-voltage power supply circuit receives ac input, effects rectification and successive multiplication, and outputs a high dc voltage. The high-voltage power supply circuit includes a plurality of diode bridges connected to a secondary winding of a transformer, in series by way of capacitors, that effect full-wave rectification of an ac voltage outputted from the secondary winding. The high-voltage power supply circuit further includes a plurality of capacitors provided for each of the diode bridges that accumulate charges from the output voltage that has undergone full-wave rectification. Voltage that is a multiple of the maximum value of the ac voltage within the secondary winding and the number of stages of diode bridges (an integer multiple) is outputted at each of the connection points of the diode bridges.
    Type: Grant
    Filed: September 24, 1999
    Date of Patent: November 28, 2000
    Assignee: NEC Corporation
    Inventors: Takeshi Kawahara, Kurao Nakagawa