Patents by Inventor Kurt Alan Smith

Kurt Alan Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12690412
    Abstract: A top-down inspection system and method employs a strategy using specific geometric shaped metal alignment markers on a semiconductor die and a laminate that can be inspected using an IR camera. The metal alignment markers will align at room temperature to assess the die alignment prior to reflowing it. As silicon is transparent to IR wavelengths the system allows for the IR light to pass through the die to the laminate to see alignment features on the die and the laminate concurrently. The specific markers are placed in at least two separate locations preferably >0.5*die size apart. The robust alignment markers are substantially resistant to degradation caused by semiconductor device fabrication steps. The metal alignment markers can be small geometrical shapes to provide a more symmetrical signal which is more resistant to variability in prior processing steps than the standard marker design.
    Type: Grant
    Filed: May 7, 2024
    Date of Patent: July 21, 2026
    Assignee: International Business Machines Corporation
    Inventors: Monali Naresh Basutkar, Christopher Muzzy, Steven Paul Ostrander, Thomas Weiss, Thomas Anthony Wassick, Brian W. Quinlan, Kurt Alan Smith
  • Publication number: 20250349580
    Abstract: A top-down inspection system and method employs a strategy using specific geometric shaped metal alignment markers on a semiconductor die and a laminate that can be inspected using an IR camera. The metal alignment markers will align at room temperature to assess the die alignment prior to reflowing it. As silicon is transparent to IR wavelengths the system allows for the IR light to pass through the die to the laminate to see alignment features on the die and the laminate concurrently. The specific markers are placed in at least two separate locations preferably >0.5*die size apart. The robust alignment markers are substantially resistant to degradation caused by semiconductor device fabrication steps. The metal alignment markers can be small geometrical shapes to provide a more symmetrical signal which is more resistant to variability in prior processing steps than the standard marker design.
    Type: Application
    Filed: May 7, 2024
    Publication date: November 13, 2025
    Inventors: Monali Naresh Basutkar, Christopher Muzzy, Steven Paul Ostrander, Thomas Weiss, Thomas Anthony Wassick, Brian W. Quinlan, Kurt Alan Smith