Patents by Inventor Kurt J. Worrell

Kurt J. Worrell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9875770
    Abstract: An apparatus for reading data from a magnetic storage medium includes a plurality of magnetic read heads each configured to read a track of the magnetic storage medium and generate an analog data signal corresponding to the read track. The apparatus includes a converter to generate digital data samples from the analog data signals, and a plurality of equalizers to apply a plurality of coefficients to the digital data samples to generate a plurality of equalized signals. The plurality of coefficients are associated with different locations within the track. The apparatus includes a plurality of detectors to compute metrics and detect data bits for the plurality of equalized signals, and at least one selector to select one of the plurality of equalized signals that has a best metric from the computed metrics and to output the selected equalized signal.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: January 23, 2018
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Jefferson Elliott Singleton, George Mathew, Kurt J. Worrell, Scott Dziak
  • Patent number: 9542321
    Abstract: The disclosure is directed to a system and method for interleaving data utilizing a random access buffer that includes a plurality of independently accessible memory slots. The random access buffer is configured to store slices of incoming data sectors in free memory slots, where a free memory slot is identified by a status flag associated with a logical address of the free memory slot. Meanwhile, a label buffer is configured to store labels associated with the slices of the incoming data sectors in a sequence based upon an interleaving scheme. Media sectors including the interleaved data slices are read out from the memory slots of the random access buffer in order of the sequence of labels stored by the label buffer. As the media sectors are read out of the random access buffer, the corresponding memory slots are freed up for incoming slices of the next super-sector.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: January 10, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Zhiwei Wu, Zhibin Li, Kurt J. Worrell, Joseph R. Robert, Feina Wen
  • Publication number: 20160034393
    Abstract: The disclosure is directed to a system and method for interleaving data utilizing a random access buffer that includes a plurality of independently accessible memory slots. The random access buffer is configured to store slices of incoming data sectors in free memory slots, where a free memory slot is identified by a status flag associated with a logical address of the free memory slot. Meanwhile, a label buffer is configured to store labels associated with the slices of the incoming data sectors in a sequence based upon an interleaving scheme. Media sectors including the interleaved data slices are read out from the memory slots of the random access buffer in order of the sequence of labels stored by the label buffer. As the media sectors are read out of the random access buffer, the corresponding memory slots are freed up for incoming slices of the next super-sector.
    Type: Application
    Filed: April 24, 2014
    Publication date: February 4, 2016
    Applicant: LSI Corporation
    Inventors: Zhiwei Wu, Zhibin Li, Kurt J. Worrell, Joseph R. Robert, Feina Wen
  • Patent number: 9147430
    Abstract: An exemplary hard disk (HD) track has a full overhead section followed by user sections interleaved with intervening partial overhead sections that are too short for an HD drive (HDD) to attain sufficient timing lock using only one partial overhead section, but long enough for the drive to attain sufficient timing lock using multiple partial overhead sections to read user data from the user section immediately following the partial overhead section where sufficient timing lock is attained. The drive begins, but does not finish, attaining timing lock based on the first partial overhead section, but the drive does finish attaining timing lock based on the last partial overhead section. The drive can also read user data in subsequent user sections by maintaining or re-attaining sufficient timing lock using each successive partial overhead section. Increased user data storage is achieved without significantly impacting average latency of HDD read sessions compared to conventional HD drives.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: September 29, 2015
    Assignee: Avago Technologies General IP (Singapore) PTE. LTD.
    Inventors: Kurt J. Worrell, Jason D. Byrne, Scott M. Dziak
  • Publication number: 20150243321
    Abstract: An exemplary hard disk (HD) track has a full overhead section followed by user sections interleaved with intervening partial overhead sections that are too short for an HD drive (HDD) to attain sufficient timing lock using only one partial overhead section, but long enough for the drive to attain sufficient timing lock using multiple partial overhead sections to read user data from the user section immediately following the partial overhead section where sufficient timing lock is attained. The drive begins, but does not finish, attaining timing lock based on the first partial overhead section, but the drive does finish attaining timing lock based on the last partial overhead section. The drive can also read user data in subsequent user sections by maintaining or re-attaining sufficient timing lock using each successive partial overhead section. Increased user data storage is achieved without significantly impacting average latency of HDD read sessions compared to conventional HD drives.
    Type: Application
    Filed: March 20, 2014
    Publication date: August 27, 2015
    Applicant: LSI Corporation
    Inventors: Kurt J. Worrell, Jason D. Byrne, Scott M. Dziak
  • Patent number: 8902524
    Abstract: Hardware-based methods and apparatus are provided for inter-track interference mitigation in magnetic recording systems using averaged values. Inter-track interference (ITI) is mitigated in a magnetic recording system by obtaining ITI cancellation data; and providing the ITI cancellation data for ITI mitigation, wherein the ITI mitigation is performed in combination with an averaging procedure for one or more of ITI mitigation of averaged data and averaging of ITI mitigated data. The sector is optionally decoded using the ITI mitigated samples. Samples for one or more side track sectors can also be averaged. The averaged side track samples can be provided as ITI cancellation data for ITI mitigation. The averaging procedure optionally applies a scaling factor to each read value.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 2, 2014
    Assignee: LSI Corporation
    Inventors: Erich F. Haratsch, Ming Jin, George Mathew, Jongseung Park, Kurt J. Worrell
  • Patent number: 8873177
    Abstract: Hardware-based methods and apparatus are provided for inter-track interference mitigation in magnetic recording systems. Inter-track interference (ITI) is mitigated in a magnetic recording system by obtaining ITI cancellation data; and providing the ITI cancellation data to an ITI mitigation circuit using a write data path in the magnetic recording system. The write data path can optionally operate substantially simultaneously with the read data path performing the read operation. The ITI cancellation data comprises, for example, user data and/or media data.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: October 28, 2014
    Assignee: LSI Corporation
    Inventors: Kurt J. Worrell, Erich F. Haratsch, Changyou Xu, Jefferson E. Singleton, Kripa Venkatachalam, David G. Springberg
  • Patent number: 8830612
    Abstract: Hardware-based methods and apparatus are provided for inter-track interference mitigation in magnetic recording systems. Inter-track interference (ITI) cancellation data is stored in a memory of a read channel of a magnetic recording system. The memory can be in a write data path or a read data path of the read channel. The inter-track interference cancellation data is optionally provided to an inter-track interference mitigation circuit using at least a portion of a write data path, for example, based on a control signal. The storage of the inter-track interference cancellation data can be in response to a second control signal.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: September 9, 2014
    Assignee: LSI Corporation
    Inventors: Kurt J. Worrell, Erich F. Haratsch
  • Patent number: 8773809
    Abstract: A contact event between a sensing device and a storage medium is detected by receiving a signal indicating a physical proximity between the sensing device and the storage medium; generating a plurality of frequency bin outputs; comparing one or more frequency bin outputs to a corresponding first level threshold to yield a corresponding comparator output; summing the comparator output with at least one prior instance of the comparator output to yield an aggregated value; comparing the aggregated value to an aggregate threshold to yield an aggregate output; and generating a contact event output if one or more of a first group of the plurality of frequency bin outputs has an associated aggregate output set to a predefined binary value and a predefined minimum number of a second group of the plurality of frequency bin outputs has an associated aggregate output set to a predefined binary value.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: July 8, 2014
    Assignee: LSI Corporation
    Inventors: Ming Jin, Erich F. Haratsch, Jason S. Goldberg, Kurt J. Worrell, Scott M. Dziak, Jeffrey P. Grundvig
  • Publication number: 20130083417
    Abstract: Hardware-based methods and apparatus are provided for inter-track interference mitigation in magnetic recording systems. Inter-track interference (ITI) is mitigated in a magnetic recording system by obtaining ITI cancellation data; and providing the ITI cancellation data to an ITI mitigation circuit using a write data path in the magnetic recording system. The write data path can optionally operate substantially simultaneously with the read data path performing the read operation. The ITI cancellation data comprises, for example, user data and/or media data.
    Type: Application
    Filed: September 30, 2011
    Publication date: April 4, 2013
    Inventors: Kurt J. Worrell, Erich F. Haratsch, Changyou Xu, Jefferson E. Singleton, Kripa Venkatachalam, David G. Springberg
  • Publication number: 20130083418
    Abstract: Hardware-based methods and apparatus are provided for inter-track interference mitigation in magnetic recording systems. Inter-track interference (ITI) cancellation data is stored in a memory of a read channel of a magnetic recording system. The memory can be in a write data path or a read data path of the read channel. The inter-track interference cancellation data is optionally provided to an inter-track interference mitigation circuit using at least a portion of a write data path, for example, based on a control signal. The storage of the inter-track interference cancellation data can be in response to a second control signal.
    Type: Application
    Filed: April 30, 2012
    Publication date: April 4, 2013
    Applicant: LSI CORPORATION
    Inventors: Kurt J. Worrell, Erich F. Haratsch