Patents by Inventor Kurt Moen

Kurt Moen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260149447
    Abstract: A radio frequency (RF) switch includes an RF switch input, an RF switch output, and a stack of cascaded RF transistors. The stack of cascaded RF transistors includes a high breakdown voltage RF transistor and a low breakdown voltage RF transistor. The high breakdown voltage RF transistor is positioned closer to the RF switch input relative to the low breakdown voltage RF transistor.
    Type: Application
    Filed: November 27, 2024
    Publication date: May 28, 2026
    Inventors: Chris Masse, Roda Kanawati, Kurt Moen
  • Publication number: 20260096176
    Abstract: A semiconductor structure includes a first transistor and a second transistor. The first transistor includes first drain and source contacts in a pre-metal dielectric, a first gap in the pre-metal dielectric over an active area and offset from a first gate towards the first drain contact, and a first gap dielectric in the first gap. The second transistor includes second drain and source contacts in a pre-metal dielectric, a second gap in the pre-metal dielectric between the second drain and source contacts, and a second gap dielectric in the second gap. The first and second gap dielectrics have a dielectric constant less than that of the pre-metal dielectric. The gap dielectrics can include air. The first and/or second transistors can also include gaps over isolation areas between respective gates and respective drain and/or source contacts. The semiconductor structure can be an amplifier.
    Type: Application
    Filed: October 1, 2024
    Publication date: April 2, 2026
    Inventors: Allan K. Calvo, Roda Kanawati, Kurt Moen
  • Patent number: 12519010
    Abstract: A semiconductor-on-insulator (SOI) structure includes a semiconductor layer over a buried oxide over a handle wafer. A carbon-doped epitaxial layer is in the semiconductor layer. A doped body region is in the semiconductor layer under the carbon-doped epitaxial layer and extending to the buried oxide. The carbon-doped epitaxial layer and the doped body region have a same conductivity type. Alternatively, a doped body region in the semiconductor layer and extending to the buried oxide includes carbon dopants and body dopants, wherein a peak carbon dopant concentration is situated at a first depth, and a peak body dopant concentration is situated at a second depth below the first depth. Alternatively, an SOI transistor in the semiconductor layer includes a halo region having a different conductivity type from a source and a drain. The halo region includes carbon dopants and body dopants. The source and/or the drain adjoin the halo region.
    Type: Grant
    Filed: June 22, 2022
    Date of Patent: January 6, 2026
    Assignee: Newport Fab, LLC
    Inventor: Kurt Moen
  • Publication number: 20250285912
    Abstract: A semiconductor-on-insulator (SOI) structure includes a semiconductor layer over a buried oxide over a handle wafer. A carbon-doped epitaxial layer is in the semiconductor layer. A doped body region is in the semiconductor layer under the carbon-doped epitaxial layer and extending to the buried oxide. The carbon-doped epitaxial layer and the doped body region have a same conductivity type. Alternatively, a doped body region in the semiconductor layer and extending to the buried oxide includes carbon dopants and body dopants, wherein a peak carbon dopant concentration is situated at a first depth, and a peak body dopant concentration is situated at a second depth below the first depth. Alternatively, an SOI transistor in the semiconductor layer includes a halo region having a different conductivity type from a source and a drain. The halo region includes carbon dopants and body dopants. The source and/or the drain adjoin the halo region.
    Type: Application
    Filed: May 21, 2025
    Publication date: September 11, 2025
    Inventor: Kurt Moen
  • Publication number: 20250285913
    Abstract: A semiconductor-on-insulator (SOI) structure includes a semiconductor layer over a buried oxide over a handle wafer. A carbon-doped epitaxial layer is in the semiconductor layer. A doped body region is in the semiconductor layer under the carbon-doped epitaxial layer and extending to the buried oxide. The carbon-doped epitaxial layer and the doped body region have a same conductivity type. Alternatively, a doped body region in the semiconductor layer and extending to the buried oxide includes carbon dopants and body dopants, wherein a peak carbon dopant concentration is situated at a first depth, and a peak body dopant concentration is situated at a second depth below the first depth. Alternatively, an SOI transistor in the semiconductor layer includes a halo region having a different conductivity type from a source and a drain. The halo region includes carbon dopants and body dopants. The source and/or the drain adjoin the halo region.
    Type: Application
    Filed: May 23, 2025
    Publication date: September 11, 2025
    Inventor: Kurt Moen
  • Publication number: 20250279314
    Abstract: A semiconductor-on-insulator (SOI) structure includes a semiconductor layer over a buried oxide over a handle wafer. A carbon-doped epitaxial layer is in the semiconductor layer. A doped body region is in the semiconductor layer under the carbon-doped epitaxial layer and extending to the buried oxide. The carbon-doped epitaxial layer and the doped body region have a same conductivity type. Alternatively, a doped body region in the semiconductor layer and extending to the buried oxide includes carbon dopants and body dopants, wherein a peak carbon dopant concentration is situated at a first depth, and a peak body dopant concentration is situated at a second depth below the first depth. Alternatively, an SOI transistor in the semiconductor layer includes a halo region having a different conductivity type from a source and a drain. The halo region includes carbon dopants and body dopants. The source and/or the drain adjoin the halo region.
    Type: Application
    Filed: May 19, 2025
    Publication date: September 4, 2025
    Inventor: Kurt Moen
  • Publication number: 20250133766
    Abstract: A radio frequency (RF) switch includes a semiconductor-on-insulator (SOI) substrate including a handle wafer, a buried oxide over the handle wafer, and a thin semiconductor layer over the buried oxide. A transistor is situated in the thin semiconductor layer and includes a gate, a source, a drain. The buried oxide can have a thickness of approximately two thousand angstroms (2,000 ?) to approximately six thousand angstroms (6,000 ?). The thin semiconductor layer has a thickness less than approximately four hundred angstroms (400 ?), so as to increase maximum power handling (PMAX) of the transistor. Nickel silicides can be situated on the source and the drain in an upper portion of the thin semiconductor layer. The RF switch can be one of a plurality of RF switches situated between an RF input and an RF output of an RF device.
    Type: Application
    Filed: October 23, 2023
    Publication date: April 24, 2025
    Inventors: Roda Kanawati, Kurt Moen, David J. Howard
  • Patent number: 11955555
    Abstract: A field effect transistor (FET) includes an active region including a source region, a drain region, and a channel region. The channel region is under a gate and situated between the source region and the drain region. A field region is next to the active region. The channel region has an interface with the field region. The gate has a wide outer gate segment proximate to the interface and a narrow inner gate segment distant from the interface. The wide outer gate segment produces an outer channel length greater than an inner channel length that is produced from the narrow inner gate segment, thereby reducing a leakage current of the FET during an OFF state.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: April 9, 2024
    Assignee: Newport Fab, LLC
    Inventors: Rula Badarneh, Roda Kanawati, Kurt Moen, Paul D. Hurwitz
  • Publication number: 20230395722
    Abstract: A field effect transistor (FET) includes an active region including a source region, a drain region, and a channel region. The channel region is under a gate and situated between the source region and the drain region. A field region is next to the active region. The channel region has an interface with the field region. The gate has a wide outer gate segment proximate to the interface and a narrow inner gate segment distant from the interface. The wide outer gate segment produces an outer channel length greater than an inner channel length that is produced from the narrow inner gate segment, thereby reducing a leakage current of the FET during an OFF state.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 7, 2023
    Inventors: Rula BADARNEH, Roda Kanawati, Kurt Moen, Paul D. Hurwitz
  • Publication number: 20230360962
    Abstract: A semiconductor-on-insulator (SOI) structure includes a semiconductor layer over a buried oxide over a handle wafer. A carbon-doped epitaxial layer is in the semiconductor layer. A doped body region is in the semiconductor layer under the carbon-doped epitaxial layer and extending to the buried oxide. The carbon-doped epitaxial layer and the doped body region have a same conductivity type. Alternatively, a doped body region in the semiconductor layer and extending to the buried oxide includes carbon dopants and body dopants, wherein a peak carbon dopant concentration is situated at a first depth, and a peak body dopant concentration is situated at a second depth below the first depth. Alternatively, an SOI transistor in the semiconductor layer includes a halo region having a different conductivity type from a source and a drain. The halo region includes carbon dopants and body dopants. The source and/or the drain adjoin the halo region.
    Type: Application
    Filed: June 22, 2022
    Publication date: November 9, 2023
    Inventor: Kurt Moen
  • Publication number: 20170338321
    Abstract: A radio frequency (RF) switch includes a plurality of series-connected silicon-on-insulator (SOI) CMOS transistors fabricated using a 0.13 micron (or larger) process, wherein the SOI CMOS transistors include nickel silicide formed on the source/drain regions. Each of the series-connected SOI CMOS transistors has a gate length of about 0.13 microns or more, thereby enabling these SOI CMOS transistors to handle high power RF signals, and exhibit the high breakdown voltages required to implement an RF switch. The nickel silicide regions advantageously contribute to a relatively a low on-resistance (RON) of the SOI CMOS transistors, while consuming a relatively small amount of the underlying silicon regions during their fabrication. The SOI CMOS transistors can be fabricated on a relatively thin silicon layer, thereby contributing to a relatively low off capacitance (COFF) of the SOI CMOS transistors. As a result, an RON*COFF value of the RF switch is advantageously minimized.
    Type: Application
    Filed: May 18, 2016
    Publication date: November 23, 2017
    Inventors: Paul D. Hurwitz, Kurt Moen