Patents by Inventor Kurt Rottner

Kurt Rottner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6703294
    Abstract: A method for producing a crystalline layer of SiC having at least a region thereof doped with boron atoms comprises a step a) of ion implantation of boron into a layer (1) of crystalline SiC and a step b) of heating the SiC-layer for annealing it for making the boron implanted therein electrically active. The method further comprises a step c) of implanting carbon atoms in said layer (1) for forming carbon interstitials in excess with respect to carbon vacancies present in the SiC-layer before carrying out step b).
    Type: Grant
    Filed: October 21, 1996
    Date of Patent: March 9, 2004
    Assignee: Cree, Inc.
    Inventors: Adolf Schöner, Kurt Rottner
  • Patent number: 6104043
    Abstract: A Schottky diode of SiC has a substrate layer, a drift layer and emitter layer regions formed in the drift layer. A metal layer makes an ohmic contact to the emitter layer regions and Schottky contact to the drift layer. A depletion of the drift layer region between two adjacent emitter layer regions is allowed in the blocking state of the diode making the two adjacent p-type emitter layer regions form a continuous depleted region therebetween in this state.
    Type: Grant
    Filed: February 20, 1997
    Date of Patent: August 15, 2000
    Assignee: ABB Research Ltd.
    Inventors: Willy Hermansson, Bo Bijlenga, Lennart Ramberg, Kurt Rottner, Lennart Zdansky, Christopher Ian Harris, Mietek Bakowski, Adolf Schoner, Nils Lundberg, Mikael Ostling, Fanny Dahlquist
  • Patent number: 6040237
    Abstract: A semiconductor component and a method for processing said component, which comprises a pn junction, where both the p-conducting (3) and the n-conducting layers (2) of the pn junction constitute doped silicon carbide layers and where the edge of the higher doped conducting layer of the pn junction exhibits a charge profile with a stepwise or uniformly decreasing total charge or effective surface charge density from the initial value at the main pn junction to a zero or almost zero total charge or charge density at the outermost edge of the junction following a radial direction from the central part of the junction towards the outermost edge.
    Type: Grant
    Filed: October 23, 1997
    Date of Patent: March 21, 2000
    Assignee: ABB Research Ltd.
    Inventors: Mietek Bakowski, Ulf Gustafsson, Kurt Rottner, Susan Savage
  • Patent number: 6002159
    Abstract: A semiconductor component including a silicon carbide substrate. A pn junction includes doped layers of the substrate. The pn junction includes at a surface of the substrate a low doped first conductivity type layer and at a portion of the surface of the substrate a highly doped second conductivity type layer. An edge termination region of the pn junction laterally surrounds the pn junction provided at an edge of at least one of the layers of the pn junction. The edge termination region includes zones of the second conductivity type located at an edge of the highly doped second conductivity type layer. A charge content of the zones decreases toward an edge of the edge termination region in accordance with at least one characteristic selected from the group consisting of a stepwise or continuously decreasing total charge towards an outer border of the edge termination region and a decreasing effective sheet charge density toward an outer border of the edge termination region.
    Type: Grant
    Filed: July 16, 1996
    Date of Patent: December 14, 1999
    Assignee: ABB Research Ltd.
    Inventors: Mietek Bakowski, Ulf Gustafsson, Kurt Rottner, Susan Savage
  • Patent number: 5902117
    Abstract: A pn-diode of SiC has a first emitter layer part doped with first dopants having a low ionization energy and a second part designed as a grid and having portions extending vertically from above and past the junction between the drift layer and the first part and being laterally separated from each other by drift layer regions for forming a pn-junction by the first part and the drift layer adjacent such portions at a vertical distance from a lower end of the grid portions. The different parameters of the device are selected to allow a depletion of the drift layer in the blocking state form a continuous depleted region between the grid portions, to thereby screen off the high electric field at the pn-junction so that it will not be exposed to high electrical fields.
    Type: Grant
    Filed: May 21, 1997
    Date of Patent: May 11, 1999
    Assignee: ABB Research Ltd.
    Inventors: Kurt Rottner, Adolf Schoner, Mietek Bakowski
  • Patent number: 5849620
    Abstract: A method for producing a semiconductor device having a semiconductor layer of SiC is disclosed. The method comprises the steps of applying an insulation layer on the semiconductor layer, implanting first impurity dopant into the semiconductor layer, and annealing this layer at at least about 1500.degree. C. so that the implanted first impurity dopant is activated, wherein the insulating layer comprises AlN as a major component and the insulating layer is applied before the annealing step and maintained on the semiconductor layer during the annealing step.
    Type: Grant
    Filed: October 30, 1995
    Date of Patent: December 15, 1998
    Assignee: ABB Research Ltd.
    Inventors: Christopher Harris, Kurt Rottner
  • Patent number: 5710059
    Abstract: A method for producing a semiconductor device comprises a step of implanting first conductivity type impurity dopants of at least two different elements in a semiconductor layer being doped according to a second opposite conductivity type, and after that anneal the semiconductor layer at such a high temperature that one of said elements is diffusing slowly into the semiconductor layer and the other is diffusing rapidly thereinto.
    Type: Grant
    Filed: April 24, 1996
    Date of Patent: January 20, 1998
    Assignee: ABB Research Ltd.
    Inventor: Kurt Rottner
  • Patent number: 5705406
    Abstract: A method for producing a semiconductor device having semiconductor layers of SiC with at least three doped layers on top of each other, comprises the steps of growing a first semiconductor layer of SiC; implanting an impurity dopant into the first layer to form a second doped surface layer as a sub-layer therein, the second doped surface layer being surrounded, except for the top surface thereof, by the first semiconductor layer; and epitaxially growing a third semiconductor layer of SiC on top of the second layer of SiC and regions of the first layer adjacent thereto to totally bury the second semiconductor layer. The impurity dopant implanted into the first semiconductor layer is of a first conductivity n or p type, and the first semiconductor layer being doped with a second, opposite conductivity type, so as to form a pn-junction at the interface between the first and second layers.
    Type: Grant
    Filed: April 24, 1996
    Date of Patent: January 6, 1998
    Assignee: ABB Research Ltd.
    Inventors: Kurt Rottner, Adolf Schoner, Nils Nordell
  • Patent number: 5674765
    Abstract: A method for producing a semiconductor device comprising a step a) of implanting an impurity dopant of a first conductivity type into said semiconductor layer (1) being doped according to a second opposite conductivity type for forming a first type doped surface layer (2) surrounded, except for the top surface thereof, by second conductivity type doped regions (3) of said semiconductor layer for forming a pn-junction (4) at the interface thereto. A highly doped additional semiconductor layer (5) is grown on top of said surface layer (2) for forming a contact layer allowing a low resistance ohmic contact to be established to the device so created.
    Type: Grant
    Filed: April 24, 1996
    Date of Patent: October 7, 1997
    Assignee: ABB Research Ltd.
    Inventors: Kurt Rottner, Adolf Schoner
  • Patent number: 5053727
    Abstract: A circuit comprising an oscillator having a load coupled thereto by means of at least one voltage-dependent coupling element that exhibits a high impedance at relatively low voltages and low impedance at relatively higher voltages. The voltage-dependent coupling element can comprise two series connected Zener diodes connected such that the anodes of the diodes are coupled together. The voltage-dependent coupling element can also comprise a varistor.
    Type: Grant
    Filed: April 23, 1990
    Date of Patent: October 1, 1991
    Assignee: Siemens Aktiengesellschaft
    Inventors: Wolfango Jann, Kurt Rottner