Patents by Inventor Kurt Vernon Smith

Kurt Vernon Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Conditions for burn-in of high power semiconductors
    Patent number: 10319648
    Abstract: Techniques for improving reliability of III-N devices include holding the III-N devices at a first temperature less than or equal to 30° for a first period of time while applying a first gate-source voltage lower than a threshold voltage of the III-N devices and a first drain-source voltage greater than 0.2 times a break down voltage of the III-N devices; and holding the III-N devices at a second temperature greater than the first temperature for a second period of time while applying a second gate-source voltage lower than a threshold voltage of the III-N devices and a second drain-source voltage greater than 0.2 times a breakdown voltage of the III-N devices. After holding the III-N devices at the first and second temperatures, screening the III-N devices based on electrical performance of one or more parameters of the III-N devices.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: June 11, 2019
    Assignee: Transphorm Inc.
    Inventors: Kurt Vernon Smith, Likun Shen, David Michael Rhodes, Ronald Avrom Barr, James Leroy McKay
  • CONDITIONS FOR BURN-IN OF HIGH POWER SEMICONDUCTORS
    Publication number: 20180301386
    Abstract: Techniques for improving reliability of III-N devices include holding the III-N devices at a first temperature less than or equal to 30° for a first period of time while applying a first gate-source voltage lower than a threshold voltage of the III-N devices and a first drain-source voltage greater than 0.2 times a break down voltage of the III-N devices; and holding the III-N devices at a second temperature greater than the first temperature for a second period of time while applying a second gate-source voltage lower than a threshold voltage of the III-N devices and a second drain-source voltage greater than 0.2 times a breakdown voltage of the III-N devices. After holding the III-N devices at the first and second temperatures, screening the III-N devices based on electrical performance of one or more parameters of the III-N devices.
    Type: Application
    Filed: April 17, 2018
    Publication date: October 18, 2018
    Inventors: Kurt Vernon Smith, Likun Shen, David Michael Rhodes, Ronald Avrom Barr, James Leroy McKay