Patents by Inventor Kushagra Sharma

Kushagra Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250004961
    Abstract: A direct memory access (DMA) system includes a read request circuit configured to receive read requests from a plurality of client circuits. The DMA system includes a response reassembly circuit configured to reorder read completion data received from a plurality of different hosts in response to the read requests. The DMA system includes a read scheduler circuit configured to schedule conveyance of the read completion data from the response reassembly circuit to the plurality of client circuits. The DMA system includes a data pipeline circuit implementing a plurality of data paths coupled to respective ones of the plurality of client circuits for conveying the read completion data as scheduled by the read scheduler circuit.
    Type: Application
    Filed: June 29, 2023
    Publication date: January 2, 2025
    Applicant: Xilinx, Inc.
    Inventors: Chandrasekhar S. Thyamagondlu, Kushagra Sharma, Surender Reddy Kisanagar
  • Patent number: 12136286
    Abstract: Keypoint extraction is done for extracting keypoints from images of documents. Based on different keypoint extraction approaches used by existing keypoint extraction mechanisms, number of keypoints extracted and related parameters vary. Disclosed herein is a method and system for keypoint extraction from images of one or more documents. In this method, a reference image and a test image of a document are collected as input. During the keypoint extraction, based on types of characters present in words extracted from the document images, a plurality of words are extracted. Further, all connected components in each of the extracted words are identified. Further, it is decided whether keypoints are to be searched in a first component or in a last component of all the identified connected components, and accordingly searches and extracts at least four of the keypoints from the test image and the corresponding four keypoints from the reference image.
    Type: Grant
    Filed: September 6, 2020
    Date of Patent: November 5, 2024
    Assignee: Tata Consultancy Services Limited
    Inventors: Kushagra Mahajan, Monika Sharma, Lovekesh Vig
  • Publication number: 20240344087
    Abstract: The disclosure relates to compositions and methods that modify target nucleic acids, as well as methods of detecting nucleic acids. Various compositions are described herein, including compositions comprising endonucleases, endonuclease systems, and chimeric proteins having the endonuclease and a nucleic-acid modulating domain or a nucleic acid modifying domain.
    Type: Application
    Filed: November 24, 2023
    Publication date: October 17, 2024
    Inventors: Basem AL-SHAYEB, Jacob BORRAJO, Mohammad Kamyab JAVANMARDI, Kushagra SHARMA
  • Patent number: 11726936
    Abstract: A system can include a plurality of processors. Each processor of the plurality of processors can be configured to execute program code. The system can include a direct memory access system configured for multi-processor operation. The direct memory access system can include a plurality of data engines coupled to a plurality of interfaces via a plurality of switches. The plurality of switches can be programmable to couple different ones of the plurality of data engines to different ones of the plurality of processors for performing direct memory access operations based on a plurality of host profiles corresponding to the plurality of processors.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: August 15, 2023
    Inventors: Chandrasekhar S. Thyamagondlu, Darren Jue, Ravi Sunkavalli, Akhil Krishnan, Tao Yu, Kushagra Sharma
  • Publication number: 20220092010
    Abstract: A system can include a plurality of processors. Each processor of the plurality of processors can be configured to execute program code. The system can include a direct memory access system configured for multi-processor operation. The direct memory access system can include a plurality of data engines coupled to a plurality of interfaces via a plurality of switches. The plurality of switches can be programmable to couple different ones of the plurality of data engines to different ones of the plurality of processors for performing direct memory access operations based on a plurality of host profiles corresponding to the plurality of processors.
    Type: Application
    Filed: December 3, 2021
    Publication date: March 24, 2022
    Applicant: Xilinx, Inc.
    Inventors: Chandrasekhar S. Thyamagondlu, Darren Jue, Ravi Sunkavalli, Akhil Krishnan, Tao Yu, Kushagra Sharma
  • Patent number: 11232053
    Abstract: A direct memory access (DMA) system can include a memory configured to store a plurality of host profiles, a plurality of interfaces, wherein two or more of the plurality of interfaces correspond to different ones of a plurality of host processors, and a plurality of data engines coupled to the plurality of interfaces. The plurality of data engines are independently configurable to access different ones of the plurality of interfaces for different flows of a DMA operation based on the plurality of host profiles.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: January 25, 2022
    Assignee: Xilinx, Inc.
    Inventors: Chandrasekhar S. Thyamagondlu, Darren Jue, Ravi Sunkavalli, Akhil Krishnan, Tao Yu, Kushagra Sharma
  • Patent number: 10657084
    Abstract: A memory circuit is configured for storage of completion queues. Each completion queue can store completion descriptors associated with transfers of data from interrupt source circuits to the memory circuit. A direct memory access circuit provides access to the memory circuit for the interrupt source circuits. An interrupt engine issues interrupt messages for processing the completion descriptors in the completion queues in response to satisfaction of a set of trigger conditions specified in an active interrupt moderation mode. The active interrupt moderation mode is one of multiple available interrupt moderation modes. The interrupt engine bypasses issuing interrupt messages in response to the set of trigger conditions of the active interrupt moderation mode not being satisfied.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: May 19, 2020
    Assignee: Xilinx, Inc.
    Inventors: Chandrasekhar S. Thyamagondlu, Darren Jue, Tao Yu, Kushagra Sharma, Tuan Van-Dinh
  • Publication number: 20170137968
    Abstract: The present invention relates generally to methods, algorithms, kits and systems for assessing health, diagnosing disease and generating recommendations using SNV markers specific to a cohort. A genetic sample of an individual is assayed using a genotyping assay to identify at least one SNV. The genotyping assay may be a computer analysis using a database, a nucleic acid microarray assay or a PCR assay. The identified SNV can be compared with a database of SNV markers to identify a plurality of risk SNVs, which are associated with a disease state or pathological condition, including pharmacological sensitivity or resistance. A genetic risk factor (GRF) may be calculated using a weighted score. The GRF is used to determine the risk level associated with the disease. A matrix may be generated using the genetic profile and recommendations specific to cohort and physiologic data. The user is allowed to input physiologic and genomic data, which is compared to the matrix to generate recommendations.
    Type: Application
    Filed: September 7, 2016
    Publication date: May 18, 2017
    Applicant: Global Gene Corporation Pte. Ltd.
    Inventors: Saumya Jamuar, Jonathan Picker, Shalendra Porwal, Kushagra Sharma, Sumit Jamuar
  • Publication number: 20080091620
    Abstract: A method for estimating the relative impact of two or more patent portfolios belonging to one or more companies is disclosed. Each patent of a patent portfolio is categorized into at least one market segment. A Technological Strength Index (TSI) is computed for each patent based on patent citations. An Economic Impact Index (EII) value is computed for each market segment based on the market size and market growth rate of the market segment, and the market share of the company in each market segment. A Company Innovation Efficiency Index (CIEI) value is computed for the patent portfolio based on the R&D expenditure of the company and the number of patents granted to the company. TSI and EII values of patents in a patent portfolio, and the CIEI value of the patent portfolio are used to compute an Overall Index for the patent portfolio. A similar exercise is carried out for all the portfolios being analyzed. The Overall Index provides a relative measure of the impact of the patent portfolios.
    Type: Application
    Filed: February 6, 2004
    Publication date: April 17, 2008
    Inventors: Marc Vollenweider, Gaurav Batti, Animesh Kumar, Kushagra Sharma