Abstract: Aspect of the disclosure include a testing apparatus and a method for testing an integrated circuit. One embodiment of the testing apparatus may comprise a main probe pin configured for electrical testing of a sample, the sample having a terminal pad, and a secondary probe pin configured for contact testing of the main probe pin against the terminal pad. In some embodiments, the testing apparatus may further comprise an indicator circuit electrically connected to the main probe pin and the secondary probe pin. The indicator circuit may output a signal when the main probe pin and the secondary probe pin are in simultaneous electrical engagement with the terminal pad.

Abstract: A system includes probe pins each including a probe tip and a plurality of thermocouples arranged such that at least one thermocouple is positioned between a pair of the probe pins. The plurality of thermocouples can be placed adjacent or above a device under test (DUT). The probe tips of the probe pins are placed over a plurality of pads. The plurality of thermocouples are placed adjacent or between the plurality of pads. The at least one thermocouple positioned between the pair of the probe pins can be either a single thermocouple or a thermocouple array.

Abstract: A testing apparatus comprises a first electromagnet. The first electromagnet can be configured to expose a first test device to a first electromagnetic field. The testing apparatus also comprises a second electromagnet. The second electromagnet can be configured to expose a second test device to a second electromagnetic field.

Abstract: A system includes probe pins each including a probe tip and a plurality of thermocouples arranged such that at least one thermocouple is positioned between a pair of the probe pins. The plurality of thermocouples can be placed adjacent or above a device under test (DUT). The probe tips of the probe pins are placed over a plurality of pads. The plurality of thermocouples are placed adjacent or between the plurality of pads. The at least one thermocouple positioned between the pair of the probe pins can be either a single thermocouple or a thermocouple array.

Abstract: A test probe assembly for use in testing a semiconductor wafer includes a probe card, a plurality of test probes mounted to the probe card and one or more piezoelectric elements mounted to each test probe. The piezoelectric elements are configured to move respective probe ends of the individual test probes in at least one direction to facilitate realignment of the probe ends for semiconductor wafer testing.

Abstract: A test probe assembly for determining the integrity of a test pad of a semiconductor wafer. The test probe assembly includes a probe card, a plurality of test probes mounted to the probe card, a fiber optic lead mounted to each test probe and arranged to direct incident light toward individual test pads of the semiconductor wafer and a plurality of photodetectors arranged about the probe card. Individual photodetectors are configured to receive light reflected off a dielectric coating of the test pad corresponding to a first set of light rays emitted by the test pad and configured to receive light reflected off a metallic base of the test pad corresponding to a second set of light rays emitted by the test pad, and to generate first and second output signals associated with the first and second sets of light rays to create image data of the individual test pads.

Abstract: A test probe assembly includes a probe card, a plurality of test probes mounted to the probe card with each of the test probes having a probe tip segment and a probe end for positioning adjacent respective individual test pads of a semiconductor wafer, and a fiber optic lead mounted to each test probe. The fiber optic leads are arranged to direct incident light toward respective individual test pads of the semiconductor wafer. A plurality of photodetectors may be arranged about the probe card with individual photodetectors configured for reception of light reflected off the respective individual test pads to emit output signals used to generate image data representative of the individual test pads on the semiconductor wafer. The image data may be utilized to align the test pads with the test probes for subsequent testing.

Abstract: A test probe assembly for use in testing a semiconductor wafer includes a probe card, a plurality of test probes mounted to the probe card and one or more piezoelectric elements mounted to each test probe. The piezoelectric elements are configured to move respective probe ends of the individual test probes in at least one direction to facilitate realignment of the probe ends for semiconductor wafer testing.

Abstract: A test probe assembly includes a probe card, a plurality of test probes mounted to the probe card with each of the test probes having a probe tip segment and a probe end for positioning adjacent respective individual test pads of a semiconductor wafer, and a fiber optic lead mounted to each test probe. The fiber optic leads are arranged to direct incident light toward respective individual test pads of the semiconductor wafer. A plurality of photodetectors may be arranged about the probe card with individual photodetectors configured for reception of light reflected off the respective individual test pads to emit output signals used to generate image data representative of the individual test pads on the semiconductor wafer. The image data may be utilized to align the test pads with the test probes for subsequent testing.

Abstract: A test probe assembly for determining the integrity of a test pad of a semiconductor wafer. The test probe assembly includes a probe card, a plurality of test probes mounted to the probe card, a fiber optic lead mounted to each test probe and arranged to direct incident light toward individual test pads of the semiconductor wafer and a plurality of photodetectors arranged about the probe card. Individual photodetectors are configured to receive light reflected off a dielectric coating of the test pad corresponding to a first set of light rays emitted by the test pad and configured to receive light reflected off a metallic base of the test pad corresponding to a second set of light rays emitted by the test pad, and to generate first and second output signals associated with the first and second sets of light rays to create image data of the individual test pads.