Patents by Inventor Kwai-Kwong K. Lam

Kwai-Kwong K. Lam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Automatic mode setting and power ramp compensator for system power on conditions
    Patent number: 7505739
    Abstract: A GPS receiver with automatic mode-setting and power ramping circuitry is disclosed.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: March 17, 2009
    Assignee: Atheros Technology Ltd.
    Inventors: Kwai-Kwong K. Lam, Christopher Rudolph Leon, Rabih Makarem
  • Automatic gain control and tuned low noise amplifier for process-independent gain systems
    Patent number: 7471152
    Abstract: A tuned low-noise amplifier is disclosed. A device in accordance with the present invention comprises a first current source, a second current source, a comparator, coupled to the first current source and the second current source, for providing a control signal, and a third current source, receiving the control signal and coupled to the tuned low-noise amplifier, wherein a current in the third current source is proportional to a current in the first current source and the second current source, where values of the first current source, the second current source, and the third current source are based on a quasi-Proportional-To-Absolute-Temperature (PTAT) curve.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: December 30, 2008
    Assignee: Atheros Technology Ltd.
    Inventors: Lloyd Jian-Le Jiang, Rabih Makarem, Kwai-Kwong K. Lam, Christopher R. Leon
  • Two-bit offset cancelling A/D converter with improved common mode rejection and threshold sensitivity
    Patent number: 7379008
    Abstract: A two-bit offset canceling A/D converter with improved common mode rejection and threshold sensitivity for use in GPS receivers. A device in accordance with the present invention comprises a level shifter, the level shifter receiving a positive signal and a negative signal, the level shifter shifting the positive signal and the negative signal such that a difference between the positive signal and the negative signal is larger than a threshold value, and a comparator, coupled to the level shifter, the comparator providing as outputs of the comparators a sign bit and two magnitude bits wherein the comparator comprises a plurality of switched capacitor amplifiers.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: May 27, 2008
    Assignee: Atheros Technology Ltd.
    Inventors: Rabih Makarem, Kwai-Kwong K. Lam
  • Two-bit offset cancelling A/D converter with improved common mode rejection and threshold sensitivity
    Patent number: 7170437
    Abstract: A two-bit offset canceling A/D converter with improved common mode rejection and threshold sensitivity for use in GPS receivers. A device in accordance with the present invention comprises a level shifter, the level shifter receiving a positive signal and a negative signal, the level shifter shifting the positive signal and the negative signal such that a difference between the positive signal and the negative signal is larger than a threshold value, and a comparator, coupled to the level shifter, the comparator providing as outputs of the comparators a sign bit and two magnitude bits wherein the comparator comprises a plurality of switched capacitor amplifiers.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: January 30, 2007
    Assignee: u-Nav Microelectronics Corporation
    Inventors: Rabih Makarem, Kwai-Kwong K. Lam