Patents by Inventor Kwame Osei Boateng

Kwame Osei Boateng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method for test-stimuli compaction
    Patent number: 7260793
    Abstract: Based on the concept of minimization, a method of static compaction has been developed for a digital circuit. The compaction method is a combination of two main procedures: one for the selection of essential test stimuli and the other for the elimination of redundant test stimuli, and effective in minimizing any set of test stimuli without modifying any of the test stimuli.
    Type: Grant
    Filed: November 6, 2001
    Date of Patent: August 21, 2007
    Assignee: Fujitsu Limited
    Inventor: Kwame Osei Boateng
  • Device and method for testing phase-locked loops
    Patent number: 6642701
    Abstract: A phase-locked loop (PLL) is tested based on a divide-and-conquer strategy. First, digital components in the PLL are isolated from analog components and tested. Next, the digital components are connected to the analog components and the PLL is exercised by causing it to undergo a series of frequency transitions.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: November 4, 2003
    Assignee: Fujitsu Limited
    Inventor: Kwame Osei Boateng
  • Device and method for testing phase-locked loops
    Publication number: 20030038619
    Abstract: A phase-locked loop (PLL) is tested based on a divide-and-conquer strategy. First, digital components in the PLL are isolated from analog components and tested. Next, the digital components are connected to the analog components and the PLL is exercised by causing it to undergo a series of frequency transitions.
    Type: Application
    Filed: January 18, 2002
    Publication date: February 27, 2003
    Inventor: Kwame Osei Boateng
  • Apparatus and method for test-stimuli compaction
    Publication number: 20020184587
    Abstract: Based on the concept of minimization, a method of static compaction has been developed for a digital circuit. The compaction method is a combination of two main procedures: one for the selection of essential test stimuli and the other for the elimination of redundant test stimuli, and effective in minimizing any set of test stimuli without modifying any of the test stimuli.
    Type: Application
    Filed: November 6, 2001
    Publication date: December 5, 2002
    Applicant: Fujitsu Limited
    Inventor: Kwame Osei Boateng