Patents by Inventor Kwang-chul Choi

Kwang-chul Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136067
    Abstract: A method for monitoring an object is provided. The method includes the steps of: in response to information on a behavior of a domestic animal being estimated from sensor data measured by a sensor for the domestic animal using a machine learning-based behavior recognition model, estimating health status of the domestic animal with reference to the information on the behavior of the domestic animal and a health criterion for the domestic animal; and determining first breeding information on the domestic animal to be provided to a user on the basis of the health status.
    Type: Application
    Filed: August 22, 2021
    Publication date: April 25, 2024
    Applicant: Bodit Inc.
    Inventors: Kwang Jae Choo, Min Yong Shin, Heung Jong Yoo, Yoon Chul Choi, Seongjin Kim, Nayeon Kim
  • Publication number: 20240107032
    Abstract: The present invention relates to an image encoding and decoding technique, and more particularly, to an image encoder and decoder using unidirectional prediction. The image encoder includes a dividing unit to divide a macro block into a plurality of sub-blocks, a unidirectional application determining unit to determine whether an identical prediction mode is applied to each of the plurality of sub-blocks, and a prediction mode determining unit to determine a prediction mode with respect to each of the plurality of sub-blocks based on a determined result of the unidirectional application determining unit.
    Type: Application
    Filed: December 7, 2023
    Publication date: March 28, 2024
    Applicants: Electronics and Telecommunications Research Institute, Kwangwoon University Industry-Academic Collaboration Foundation, University-Industry Cooperation Group of Kyung Hee University
    Inventors: Hae Chul CHOI, Se Yoon JEONG, Sung-Chang LIM, Jin Soo CHOI, Jin Woo HONG, Dong Gyu SIM, Seoung-Jun OH, Chang-Beom AHN, Gwang Hoon PARK, Seung Ryong KOOK, Sea-Nae PARK, Kwang-Su JEONG
  • Publication number: 20240092141
    Abstract: An air conditioning device for a vehicle includes: a housing having an inside divided into an inflow space, a heat exchange space, and an outflow space, which are straightly arranged, and having a plurality of discharge ports, which communicates with an interior, at the inflow space; a blowing unit disposed at the inflow space of the housing and configured to blow air; a heat exchange unit disposed at the heat exchange space of the housing and configured to adjust a temperature of conditioned air by exchanging heat with air; and an opening-closing door disposed at the outflow space of the housing and configured to open and close the plurality of discharge ports such that conditioned air at an adjusted temperature selectively flows to the plurality of discharge ports. The air conditioning device adjusts the temperature of conditioned air for respective modes and reduces a flow resistance of air.
    Type: Application
    Filed: March 8, 2023
    Publication date: March 21, 2024
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION, DOOWON CLIMATE CONTROL CO., LTD.
    Inventors: Kwang Ok Han, Young Tae Song, Yong Chul Kim, Gee Young Shin, Su Yeon Kang, Jae Sik Choi, Dae Hee Lee, Byeong Moo Jang, Ung Hwi Kim, Jae Won Cha, Won Jun Joung, Byung Guk An
  • Patent number: 11912690
    Abstract: The present invention relates to a pidolate salt and malate salt of a compound represented by a formula 1 with an excellent liquid-phase stability, solid-phase stability, water solubility, precipitation stability and hygroscopicity all together as a compound for preventing and treating diseases mediated by an acid pump antagonistic activity, as well as a method for preparing the same.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: February 27, 2024
    Assignee: HK INNO.N CORPORATION
    Inventors: Eun Sun Kim, Min Kyoung Lee, Sung Ah Lee, Kwang Do Choi, Jae Sun Kim, Hyung Chul Yoo
  • Publication number: 20230420374
    Abstract: A semiconductor package includes a package substrate having a first side and an opposite second side, a semiconductor chip on the first side of the package substrate, a capacitor on the second side of the package substrate, a plurality of connecting terminals on the second side of the package substrate, and a metal line within a trench in the package substrate. The trench extends in a first direction, and the metal line is between the capacitor and the plurality of connecting terminals. The metal line is spaced apart from the capacitor in a second direction that is transverse to the first direction, and a distance between the metal line and the capacitor is 100 ?m or more and 1000 ?m or less.
    Type: Application
    Filed: April 19, 2023
    Publication date: December 28, 2023
    Inventors: Kwang-Chul CHOI, Sang Hyun LEE, Un-Byoung KANG, Jung Hoon KANG
  • Patent number: 9875918
    Abstract: Provided are an initiator and a method for debonding a wafer supporting system. The initiator for debonding a wafer supporting system includes a rotation chuck having an upper surface on which a wafer supporting system (WSS), which includes a carrier wafer, a device wafer, and a glue layer for bonding the carrier wafer and the device wafer to each other, is seated to rotate the wafer supporting system, a detecting module detecting a height and a thickness of the glue layer and a laser module generating a fracture portion on the glue layer through irradiating a side surface of the glue layer with a laser on the basis of the height and the thickness of the glue layer.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: January 23, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyu-Dong Jung, Jung-Hwan Kim, Dong-Gil Lee, Tae-Je Cho, Kwang-Chul Choi
  • Patent number: 9595446
    Abstract: Methods processing substrates are provided. The method may include providing a bonding layer between a substrate and a carrier to bond the substrate to the carrier, processing the substrate while the substrate is supported by the carrier, and removing the bonding layer to separate the substrate from the carrier. The bonding layer may include a thermosetting glue layer and thermosetting release layers provided on opposing sides of the thermosetting glue layer.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: March 14, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chungsun Lee, Jung-Hwan Kim, Kwang-chul Choi, Un-Byoung Kang, Jeon Il Lee
  • Patent number: 9589947
    Abstract: Provided are semiconductor devices and methods of manufacturing the same. The semiconductor package includes a substrate, a first semiconductor chip mounted on the circuit substrate and having a first width, a second semiconductor chip overlying the first semiconductor chip and having a second width greater than the first width, and a first under filler disposed between the first and second semiconductor chips, covering a side surface of the first semiconductor chip and having an inclined side surface.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: March 7, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jihwan Hwang, Young Kun Jee, Jung-Hwan Kim, Tae Hong Min, Kwang-chul Choi
  • Publication number: 20160314996
    Abstract: The inventive concepts relate to a substrate treating apparatus and a method for treating a substrate using the same. The apparatus includes a spin chuck configured to support a substrate, a grinding head disposed over the spin chuck and configured to grind the substrate supported by the spin chuck, and a nozzle member including a jet nozzle configured to jet high-pressure water to the substrate supported by the spin chuck. The jet nozzle overlaps with the substrate to jet the high-pressure water to an edge of the substrate.
    Type: Application
    Filed: April 15, 2016
    Publication date: October 27, 2016
    Inventors: IL HWAN KIM, Sang Hyun BAE, HYUEKJAE LEE, Taeje CHO, Kwang-chul CHOI
  • Patent number: 9412636
    Abstract: A method for processing substrates includes providing a bonding layer between a substrate and a carrier to bond the substrate to the carrier, processing the substrate while the substrate is supported by the carrier, and removing the bonding layer to separate the substrate from the carrier. The bonding layer may include a thermosetting release layer and thermosetting glue layers, wherein at least one of the thermosetting glue layers is provided on each side of the thermosetting release layer.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: August 9, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chungsun Lee, Jung-Seok Ahn, Kwang-chul Choi, Un-Byoung Kang, Jung-Hwan Kim, Joonsik Sohn, Jeon Il Lee
  • Publication number: 20160093518
    Abstract: Provided are an initiator and a method for debonding a wafer supporting system. The initiator for debonding a wafer supporting system includes a rotation chuck having an upper surface on which a wafer supporting system (WSS), which includes a carrier wafer, a device wafer, and a glue layer for bonding the carrier wafer and the device wafer to each other, is seated to rotate the wafer supporting system, a detecting module detecting a height and a thickness of the glue layer and a laser module generating a fracture portion on the glue layer through irradiating a side surface of the glue layer with a laser on the basis of the height and the thickness of the glue layer.
    Type: Application
    Filed: June 30, 2015
    Publication date: March 31, 2016
    Inventors: Kyu-Dong JUNG, Jung-Hwan KIM, Dong-Gil LEE, Tae-Je CHO, Kwang-Chul CHOI
  • Patent number: 9202767
    Abstract: Provided are a semiconductor device including a through via plug and a method of manufacturing the same. In the semiconductor device, since a redistributed interconnection pattern is disposed on a protection film of a convex-concave structure having a protrusion and a recessed portion, the semiconductor device may have improved reliability while preventing a leakage current. In the method of manufacturing the semiconductor device, since an end surface of through via structure is exposed by removing a protection film and an insulating film liner using a selective etching process, damage to the through via structure is minimized, thereby preventing copper contamination in a substrate.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: December 1, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji Hwang Kim, Kwang-Chul Choi, Sangwon Kim, Tae Hong Min
  • Patent number: 9196505
    Abstract: In a semiconductor device, an organic insulation pattern is disposed between first and second rerouting patterns. The organic insulation pattern may absorb the physical stress that occurs when the first and second rerouting patterns expand under heat. Since the organic insulation pattern is disposed between the first and second rerouting patterns, insulating properties can be increased relative to a semiconductor device in which a semiconductor pattern is disposed between rerouting patterns. Also, since a seed layer pattern is disposed between the first and second rerouting patterns and the organic insulation pattern and between the substrate and the organic insulation pattern, the adhesive strength of the first and second rerouting patterns is enhanced. This also reduces any issues with delamination. Also, the seed layer pattern prevents the metal that forms the rerouting pattern from being diffused to the organic insulation pattern.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: November 24, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Un-Byoung Kang, Kwang-Chul Choi, Jung-Hwan Kim, Tae Hong Min, Hojin Lee, Minseung Yoon
  • Publication number: 20150318268
    Abstract: A multi-chip package includes a first semiconductor chip and a second semiconductor chip. The first semiconductor chip has a first active surface. The second semiconductor chip has a second active surface facing the first active surface. The second active surface is electrically connected with the first active surface and the first active surface of the first semiconductor chip and the second active surface of the second semiconductor chip are bonded to each other without an adhesive.
    Type: Application
    Filed: April 27, 2015
    Publication date: November 5, 2015
    Inventors: JUNG-SEOK AHN, SANG-WON KIM, YOUNG-SANG CHO, KWANG-CHUL CHOI, SUNG-EUN PYO
  • Patent number: 9159659
    Abstract: A semiconductor package includes a first semiconductor chip, a second semiconductor chip and a sealing member. The first semiconductor chip includes a substrate having a first surface and a second surface opposite to the first surface and having an opening that extends in a predetermined depth from the second surface, and a plurality of through electrodes extending in a thickness direction from the first surface, end portions of the through electrodes being exposed through a bottom surface of the opening. The second semiconductor chip is received in the opening and mounted on the bottom surface of the opening. The sealing member covers the second semiconductor chip in the opening.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 13, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Won Kim, Kwang-Chul Choi, Hyun-Jung Song, Cha-Jea Jo, Eun-Kyoung Choi, Ji-Seok Hong
  • Patent number: 9099541
    Abstract: A semiconductor device includes a substrate having a first side and a second side such that the first and second sides face each other, a through via plug penetrating the substrate, an insulating film liner, and an antipollution film. The insulating film liner is between the through via plug and the substrate and the insulating film liner has a recessed surface with respect to the second side. The antipollution film covers the second side and the antipollution film is on the recessed surface and between the through via plug and the substrate.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: August 4, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji Hwang Kim, Sunpil Youn, Sangwon Kim, Kwang-chul Choi, Tae Hong Min
  • Publication number: 20150214089
    Abstract: A method for processing substrates includes providing a bonding layer between a substrate and a carrier to bond the substrate to the carrier, processing the substrate while the substrate is supported by the carrier, and removing the bonding layer to separate the substrate from the carrier. The bonding layer may include a thermosetting release layer and thermosetting glue layers, wherein at least one of the thermosetting glue layers is provided on each side of the thermosetting release layer.
    Type: Application
    Filed: April 9, 2015
    Publication date: July 30, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: CHUNGSUN LEE, Jung-Seok AHN, Kwang-chul CHOI, Un-Byoung KANG, Jung-Hwan KIM, JOONSIK SOHN, JEON IL LEE
  • Patent number: 9059072
    Abstract: Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: June 16, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-Kyoung Choi, SeYoung Jeong, Kwang-chul Choi, Tae Hong Min, Chungsun Lee, Jung-Hwan Kim
  • Patent number: 9023716
    Abstract: A method for processing substrates includes providing a bonding layer between a substrate and a carrier to bond the substrate to the carrier, processing the substrate while the substrate is supported by the carrier, and removing the bonding layer to separate the substrate from the carrier. The bonding layer may include a thermosetting release layer and thermosetting glue layers, wherein at least one of the thermosetting glue layers is provided on each side of the thermosetting release layer.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: May 5, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chungsun Lee, Jung-Seok Ahn, Kwang-chul Choi, Un-Byoung Kang, Jung-Hwan Kim, Joonsik Sohn, Jeon Il Lee
  • Patent number: 9006081
    Abstract: Methods of manufacturing a plurality of semiconductor chips are provided. The method may include providing a middle layer between a substrate and a carrier to combine the carrier with the substrate, thinning the substrate; after thinning the substrate, separating the carrier from the substrate; and after the carrier is separated from the substrate, cutting the substrate to form the plurality of semiconductor chips, wherein the middle layer is adhered to the carrier with a first bonding force, and the middle layer is adhered to the substrate with a second bonding force, and wherein the second bonding force is greater than the first bonding force.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: April 14, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Seok Ahn, Il Hwan Kim, Jung-Hwan Kim, Sangwook Park, Chungsun Lee, Kwang-chul Choi