Abstract: A vertical memory device includes a substrate, a plurality of channels on the substrate and extending in a vertical direction with respect to a top surface of the substrate, a plurality of non-metal gate patterns surrounding the channels and being stacked on top of each other and spaced apart from each other along the vertical direction, and a plurality of metal gate patterns stacked on top of each other. The metal gate patterns are spaced apart from each other along the vertical direction. Each of the metal gate patterns surrounds a corresponding one of the non-metal gate patterns.

Abstract: A deposition apparatus includes a chamber, a plate in the chamber and configured support a substrate, a deposition unit configured to perform a deposition process in-situ in the chamber, and a UV annealing unit configured to perform a first ultraviolet (UV) and a second ultraviolet (UV) annealing process in-situ in the chamber. The deposition process may include sequentially depositing a first sacrificial layer, a first oxide layer, a second sacrificial layer and a second oxide layer on the substrate. The first UV annealing process may be performed on the first oxide layer after the first oxide layer is deposited. The second UV annealing process may be different from the first UV annealing process and may be performed on the second oxide layer after the second oxide layer is deposited.

Abstract: A vertical memory device includes a substrate, a channel on the substrate, extending in a vertical direction with respect to a top surface of the substrate, and including a protrusion at a lower portion of the channel, the protrusion extending in a parallel direction with respect to the top surface of the substrate, a semiconductor pattern connecting the protrusion and the substrate, and gate lines stacked and spaced apart from each other in the vertical direction, the gate lines on the protrusion and the semiconductor pattern and surrounding the channel.

Abstract: A deposition apparatus includes a chamber, a plate in the chamber and configured support a substrate, a deposition unit configured to perform a deposition process in-situ in the chamber, and a UV annealing unit configured to perform a first ultraviolet (UV) and a second ultraviolet (UV) annealing process in-situ in the chamber. The deposition process may include sequentially depositing a first sacrificial layer, a first oxide layer, a second sacrificial layer and a second oxide layer on the substrate. The first UV annealing process may be performed on the first oxide layer after the first oxide layer is deposited. The second UV annealing process may be different from the first UV annealing process and may be performed on the second oxide layer after the second oxide layer is deposited.

Abstract: A nonvolatile memory device includes a conductive line disposed on a substrate and vertically extended from the substrate, a first channel layer disposed on the substrate and vertically extended from the substrate, wherein the first channel layer is spaced apart from the conductive line, a second channel layer vertically extended from the substrate, wherein the second channel layer is disposed between the first channel layer and the conductive line, a first gate electrode disposed between the conductive line and the second channel layer, wherein the first gate electrode includes a first portion having a first thickness and a second portion having a second thickness that is different from the first thickness, and a second gate electrode disposed between the first channel layer and the second channel layer, wherein the second gate electrode has the second thickness.

Abstract: A memory device, including a first memory region including a first substrate, a plurality of first semiconductor devices on the first substrate, and a first interlayer insulating layer covering the plurality of first semiconductor devices; and a second memory region including a second substrate on the first interlayer insulating layer and a plurality of second semiconductor devices on the second substrate, the second substrate including a first region in a plurality of grooves in the first interlayer insulating layer and a second region including grains extending from the first region, the second region being on an upper surface of the first interlayer insulating layer.

Abstract: A nonvolatile memory device includes a conductive line disposed on a substrate and vertically extended from the substrate, a first channel layer disposed on the substrate and vertically extended from the substrate, wherein the first channel layer is spaced apart from the conductive line, a second channel layer vertically extended from the substrate, wherein the second channel layer is disposed between the first channel layer and the conductive line, a first gate electrode disposed between the conductive line and the second channel layer, wherein the first gate electrode includes a first portion having a first thickness and a second portion having a second thickness that is different from the first thickness, and a second gate electrode disposed between the first channel layer and the second channel layer, wherein the second gate electrode has the second thickness.

Abstract: Semiconductor device are provided including a stacked structure having gate electrodes and interlayer insulating layers alternately stacked on a substrate; channel holes extending perpendicular to the substrate through the stacked structure and including channel regions therein; and horizontal parts at lower portions of the stacked structure and including areas in which the channel regions are horizontally elongated from the channel holes. The horizontal parts surround respective channel holes and are connected to each other between at a least portion of the channel holes.

Abstract: A memory device, including a first memory region including a first substrate, a plurality of first semiconductor devices on the first substrate, and a first interlayer insulating layer covering the plurality of first semiconductor devices; and a second memory region including a second substrate on the first interlayer insulating layer and a plurality of second semiconductor devices on the second substrate, the second substrate including a first region in a plurality of grooves in the first interlayer insulating layer and a second region including grains extending from the first region, the second region being on an upper surface of the first interlayer insulating layer.

Abstract: A vertical memory device includes a substrate, a channel on the substrate, extending in a vertical direction with respect to a top surface of the substrate, and including a protrusion at a lower portion of the channel, the protrusion extending in a parallel direction with respect to the top surface of the substrate, a semiconductor pattern connecting the protrusion and the substrate, and gate lines stacked and spaced apart from each other in the vertical direction, the gate lines on the protrusion and the semiconductor pattern and surrounding the channel.

Abstract: An interface device for electronic equipment including at least one port electronically connected to an external device; a housing disposed in the electronic equipment and includes an opening through which the port is drawn in and out; a door which accommodates the port and performs a first motion and a second motion, the first motion being rotation between an open position, in which the opening of the housing is open, and a close position, in which the opening is closed, the second motion being sliding between the open position and a projecting position, in which the door projects from the open position in a transverse direction to a rotation axis of the first motion parallel with an installation surface of the electronic equipment; and a driving unit which provides driving force to the door in the close position of the first motion of the door and in the second motion.

Abstract: An interface device for electronic equipment including at least one port electronically connected to an external device; a housing disposed in the electronic equipment and includes an opening through which the port is drawn in and out; a door which accommodates the port and performs a first motion and a second motion, the first motion being rotation between an open position, in which the opening of the housing is open, and a close position, in which the opening is closed, the second motion being sliding between the open position and a projecting position, in which the door projects from the open position in a transverse direction to a rotation axis of the first motion parallel with an installation surface of the electronic equipment; and a driving unit which provides driving force to the door in the close position of the first motion of the door and in the second motion.

Abstract: A computer user interface of this invention is a special interface for executing an application program, and includes a program selection button and a shell program for executing an application program corresponding to a press of the program shell button. A user can select and execute an application program registered in the shell program by means of the program selection button. In particular, the user can register an application program which can be selected by the program selection button in a program shell, thereby enabling a using environment to be fitted for the user. Since an audio player can be easily controlled by the program selection button, the user need not perform vexatious input steps for controlling the audio player using a keyboard device or a mouse.

Abstract: A portable electronic appliance, such as a portable computer, includes a battery receiving room, disposed within the main body, and a switching device for allowing a user to check the battery capacity outside of the appliance without removing the battery from the appliance. The battery, detachably installed in the room, has both a battery checking switch and a capacity display on one surface thereof. The battery checking switch is selectively operated outside of the appliance, while the capacity display is selectively operated in conjunction with the battery checking switch so as to display the battery capacity thereon. A window is formed on the battery receiving room at a position corresponding to the capacity display, thus allowing a user to check the battery capacity outside of the appliance by viewing the capacity display through the window.