Patents by Inventor Kwang Chun
Kwang Chun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240153991Abstract: A semiconductor device includes: an active pattern including a lower pattern and a plurality of sheet patterns that are spaced apart from the lower pattern; a gate structure disposed on the lower pattern; and a source/drain pattern disposed on the lower pattern, and connected to each of the plurality of sheet patterns, wherein the plurality of sheet patterns include a first sheet pattern and a second sheet pattern. The second sheet pattern is disposed between the first sheet pattern and the lower pattern. A first upper width of an upper surface of the first sheet pattern is greater than a first lower width of a bottom surface of the first sheet pattern, and a second upper width of an upper surface of the second sheet pattern is smaller than a second lower width of a bottom surface of the second sheet pattern.Type: ApplicationFiled: August 2, 2023Publication date: May 9, 2024Inventors: Gyeom KIM, Da Hye KIM, Young Kwang KIM, Jin Bum KIM, Kyung Bin CHUN
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Publication number: 20240145541Abstract: A semiconductor device includes an active pattern including a lower pattern extending in a first direction, and a plurality of sheet patterns spaced apart from the lower pattern in a second direction. The sheet patterns include an uppermost sheet pattern and a plurality of gate structures on the lower pattern and spaced apart from each other in the first direction. Each of the plurality of gate structures includes a gate electrode and a gate insulating film and a source/drain pattern between adjacent ones of the plurality of gate structures. Each of inner gate structures includes a gate electrode and a gate insulating film. A semiconductor liner film includes silicon-germanium, and contacts the gate insulating film of each of the inner gate structures. A portion of the semiconductor liner film protrudes upwardly in the first direction beyond an upper surface of the uppermost sheet pattern.Type: ApplicationFiled: May 8, 2023Publication date: May 2, 2024Applicant: Samsung Electronics Co., Ltd.Inventors: Da Hye KIM, Jin Bum KIM, Gyeom KIM, Young Kwang KIM, Kyung Bin CHUN
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Publication number: 20230260661Abstract: The present invention relates to a method and system for augmenting aneurysm learning data for augmenting artificial images formed of various result values calculated from simulation results.Type: ApplicationFiled: June 23, 2021Publication date: August 17, 2023Applicants: INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY ERICA CAMPUS, INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITYInventors: Hyeondong YANG, Je Hoon OH, Yong Bae KIM, Kwang-Chun CHO, Jung-Jae KIM
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Patent number: 11388322Abstract: A camera module includes a lens module; a first frame accommodating the lens module; a second frame accommodating the first frame; a third frame accommodating the second frame; and a housing accommodating the third frame. The lens module and the first frame are configured to rotate with respect to the second frame around an optical axis. The lens module, the first frame and the second frame are configured to rotate with respect to the third frame around a first axis that is perpendicular to the optical axis. The lens module, the first frame, the second frame, and the third frame are configured to rotate with respect to the housing around a second axis that is perpendicular to both the optical axis and the first axis.Type: GrantFiled: December 18, 2020Date of Patent: July 12, 2022Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Dae Hyun Jeong, Jong Ki Kim, Dong Yeon Shin, Gab Yong Kim, Oh Byoung Kwon, Jong In Lee, Kwang Chun Jung, Seung Hyeon Jeong
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Patent number: 11355085Abstract: Provided are a repeater device for a DisplayPort side channel and an operating method thereof. The repeater device of a DisplayPort includes: a source device processor transmits or receives an electrical signal of a side channel data of the display port to or from a source device and processes repeater data; and a sink device processor transmits or receives an electrical signal of a side channel data of the display port to or from a sink device and processes repeater data, wherein the source device processor or the sink device processor comprising a controller processes repeating of the side channel data of the display port using the repeater data which is obtained by transforming the electrical signal to an optical signal.Type: GrantFiled: October 19, 2020Date of Patent: June 7, 2022Assignee: QUALITAS SEMICONDUCTOR CO., LTD.Inventors: Seonghyeon Han, Pyungsu Han, Kwang-Chun Choi
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Patent number: 11290014Abstract: A boost direct current-to-direct current (DC-DC) converter using a delta-sigma modulator (DSM), the boost DC-DC converter may comprise a boost driving circuit outputting an output voltage to output terminals by boosting an input voltage, a resistance distribution circuit outputting a feedback voltage by distributing the output voltage of the boost driving circuit, a compensator outputting a compensated feedback voltage by compensating for the feedback voltage outputted by the resistance distribution circuit based on a reference voltage, a delta-sigma modulator outputting a digital signal by modulating the compensated feedback voltage and a duty controller outputting a duty control signal for controlling a switching duty of the boost driving circuit by receiving the output of the delta-sigma modulator.Type: GrantFiled: July 27, 2020Date of Patent: March 29, 2022Assignee: Electronics and Telecommunications Research InstituteInventors: Young Kyun Cho, Tae Joong Kim, Kwang Chun Lee, Jung Nam Lee, Jae Ho Jung
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Publication number: 20220093060Abstract: Provided are a repeater device for a DisplayPort side channel and an operating method thereof. The repeater device of a DisplayPort includes: a source device processor transmits or receives an electrical signal of a side channel data of the display port to or from a source device and processes repeater data; and a sink device processor transmits or receives an electrical signal of a side channel data of the display port to or from a sink device and processes repeater data, wherein the source device processor or the sink device processor comprising a controller processes repeating of the side channel data of the display port using the repeater data which is obtained by transforming the electrical signal to an optical signal.Type: ApplicationFiled: October 19, 2020Publication date: March 24, 2022Inventors: Seonghyeon HAN, Pyungsu HAN, Kwang-Chun CHOI
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Patent number: 11205998Abstract: An amplifier may comprise first and second matching networks; first and second transistors; and a transformer including first to third inductors. Also, a gate and a source of the first transistor are connected to the first matching network, one end of the first inductor is connected to a drain of the first transistor, the other end of the first inductor is connected to a source of the second transistor, one end of the second inductor is connected to a gate of the second transistor, the other end of the second inductor is grounded, one end of the third inductor is connected to a drain of the second transistor, and the other end of the third inductor is connected to the second matching network.Type: GrantFiled: February 11, 2020Date of Patent: December 21, 2021Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Sun Woo Kong, Kwang Seon Kim, Jee Hoon Park, Kwang Chun Lee, Hui Dong Lee, Seung Hyun Jang
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Publication number: 20210250475Abstract: A camera module includes a lens module; a first frame accommodating the lens module; a second frame accommodating the first frame; a third frame accommodating the second frame; and a housing accommodating the third frame. The lens module and the first frame are configured to rotate with respect to the second frame around an optical axis. The lens module, the first frame and the second frame are configured to rotate with respect to the third frame around a first axis that is perpendicular to the optical axis. The lens module, the first frame, the second frame, and the third frame are configured to rotate with respect to the housing around a second axis that is perpendicular to both the optical axis and the first axis.Type: ApplicationFiled: December 18, 2020Publication date: August 12, 2021Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Dae Hyun JEONG, Jong Ki KIM, Dong Yeon SHIN, Gab Yong KIM, Oh Byoung KWON, Jong In LEE, Kwang Chun JUNG, Seung Hyeon JEONG
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Publication number: 20210036613Abstract: A boost direct current-to-direct current (DC-DC) converter using a delta-sigma modulator (DSM), the boost DC-DC converter may comprise a boost driving circuit outputting an output voltage to output terminals by boosting an input voltage, a resistance distribution circuit outputting a feedback voltage by distributing the output voltage of the boost driving circuit, a compensator outputting a compensated feedback voltage by compensating for the feedback voltage outputted by the resistance distribution circuit based on a reference voltage, a delta-sigma modulator outputting a digital signal by modulating the compensated feedback voltage and a duty controller outputting a duty control signal for controlling a switching duty of the boost driving circuit by receiving the output of the delta-sigma modulator.Type: ApplicationFiled: July 27, 2020Publication date: February 4, 2021Applicant: Electronics and Telecommunications Research InstituteInventors: Young Kyun CHO, Tae Joong KIM, Kwang Chun LEE, Jung Nam LEE, Jae Ho JUNG
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Publication number: 20200266775Abstract: An amplifier may comprise first and second matching networks; first and second transistors; and a transformer including first to third inductors. Also, a gate and a source of the first transistor are connected to the first matching network, one end of the first inductor is connected to a drain of the first transistor, the other end of the first inductor is connected to a source of the second transistor, one end of the second inductor is connected to a gate of the second transistor, the other end of the second inductor is grounded, one end of the third inductor is connected to a drain of the second transistor, and the other end of the third inductor is connected to the second matching network.Type: ApplicationFiled: February 11, 2020Publication date: August 20, 2020Inventors: Sun Woo KONG, Kwang Seon KIM, Jee Hoon PARK, Kwang Chun LEE, Hui Dong LEE, Seung Hyun JANG
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Patent number: 10009166Abstract: A hybrid clock data recovery circuit includes a linear phase detector configured to generate a recovered data signal by sampling an input data signal in response to a clock signal, and to generate up and down signals having a pulse width difference that is linearly proportional to a phase difference between the input data signal and the clock signal. An arbiter is configured to generate a bang-bang up signal representing that a phase of the input data signal leads a phase of the clock signal and a bang-bang down signal representing that the phase of the clock signal leads the phase of the input data signal based on the up and down signals. A digital loop filter is configured to generate a digital control code based on the bang-bang up and down signals. A digitally controlled oscillator is configured to generate an oscillating frequency of the clock signal in response to the digital control code, and to adjust the oscillating frequency of the clock signal in response to the up and down signals.Type: GrantFiled: May 23, 2017Date of Patent: June 26, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kwang-Chun Choi, Jong-Shin Shin, Sung-Jun Kim, Hye-Yeon Yang, Byung-Hyun Lim, Woo-Chul Jung
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Publication number: 20180152283Abstract: A hybrid clock data recovery circuit includes a linear phase detector configured to generate a recovered data signal by sampling an input data signal in response to a clock signal, and to generate up and down signals having a pulse width difference that is linearly proportional to a phase difference between the input data signal and the clock signal. An arbiter is configured to generate a bang-bang up signal representing that a phase of the input data signal leads a phase of the clock signal and a bang-bang down signal representing that the phase of the clock signal leads the phase of the input data signal based on the up and down signals. A digital loop filter is configured to generate a digital control code based on the bang-bang up and down signals. A digitally controlled oscillator is configured to generate an oscillating frequency of the clock signal in response to the digital control code, and to adjust the oscillating frequency of the clock signal in response to the up and down signals.Type: ApplicationFiled: May 23, 2017Publication date: May 31, 2018Inventors: Kwang-Chun Choi, Jong-Shin Shin, Sung-Jun Kim, Hye-Yeon Yang, Byung-Hyun Lim, Woo-Chul Jung
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Patent number: 9806406Abstract: Provided is a plasma antenna. The plasma antenna includes a radiation portion formed by stacking a plurality of radiation disks generating plasma based on provided energy and radiating a signal using the generated plasma, an energy generation portion configured to provide the energy to at least one of the plurality of radiation disks, and a signal transmission portion configured to provide the signal to the at least one radiation disk provided with the energy. Therefore, it is possible to support multiple frequency bands.Type: GrantFiled: January 23, 2015Date of Patent: October 31, 2017Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Kwang Chun Lee, Cheol Ho Kim, Gweon Do Jo
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Patent number: 9577337Abstract: Disclosed is a dual polarization-based small antenna for a mobile communication base station. The dual-polarized antenna includes a substrate, a first feed attached to one surface of the substrate, a second feed spaced apart from the first feed and attached to the one surface of the substrate, a radiator located above the first feed and the second feed, and a spiral resonator located between the first feed and the second feed. The dual-polarized antenna effectively provides a broad bandwidth and a high isolation characteristic while having a reduced size, and the spiral resonator allows the isolation characteristic at a certain narrow band range to be effectively enhanced by adjusting of the position, size, and shape of the spiral resonator without affecting the operating frequency of the dual-polarized antenna.Type: GrantFiled: November 11, 2014Date of Patent: February 21, 2017Inventors: Jae Ho Jung, Jung Nam Lee, Kwang Chun Lee
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Patent number: 9246142Abstract: A secondary battery is capable of fastening a positive electrode tab and a negative electrode tab to each other without performing welding. The secondary battery comprises an electrode assembly including a positive electrode plate, a negative electrode plate, and a separator interposed between the positive electrode plate and the negative electrode plate, a positive electrode tab and a negative electrode tab coupled to the positive electrode plate and the negative electrode plate, respectively, a housing accommodating the electrode assembly and having one side open, a plate sealing up the open part of the housing, a fastening unit formed so as to protrude from the plate in a non-penetrating structure, and a first tab terminal inserted into the fastening unit via the positive electrode tab so as to electrically couple the positive electrode tab and the plate to each other.Type: GrantFiled: December 10, 2010Date of Patent: January 26, 2016Assignee: Samsung SDI Co., Ltd.Inventor: Kwang-Chun Kim
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Patent number: 9231639Abstract: There is provided a high frequency transceiver appropriate for ultra low power and high frequency characteristics. The high frequency transmitting device includes a voltage controlled oscillator configured to provide an oscillation signal; and a power amplifier configured to multiply the oscillation signal by an integer to generate a carrier signal, mix the carrier signal and a baseband signal to generate a mixed signal, and amplify power of the mixed signal.Type: GrantFiled: February 11, 2015Date of Patent: January 5, 2016Assignee: Electronics & Telecommunications Research InsituteInventors: Bong Hyuk Park, Moon Sik Lee, Kwang Chun Lee
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Patent number: 9210005Abstract: Disclosed is a technique for a transmission apparatus. A method of generating a differential signal includes adding a predetermined offset to an envelope signal to generate a first signal having the same magnitude as the envelope signal with respect to 0, scaling the first signal at a predetermined rate to generate a second signal, changing a sign of the second signal to generate a third signal that is an inverted signal of the second signal, and forming a differential signal using the second signal and the third signal.Type: GrantFiled: February 6, 2015Date of Patent: December 8, 2015Assignee: Electronics and Telecommunications Research InstituteInventors: Young Kyun Cho, Sung Jun Lee, Seung Hyun Jang, Bong Hyuk Park, Jae Ho Jung, Kwang Chun Lee
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Publication number: 20150228807Abstract: Disclosed is a vertical positive-intrinsic-negative (PIN) diode. The vertical PIN diode includes an intrinsic layer, an N-type layer located on a first surface of the intrinsic layer, a P-type layer located on a second surface of the intrinsic layer, wherein the second surface is opposite to the first surface, a connection layer formed to extend to the first surface from the P-type layer, a first electrode located on the N-type layer, and a second electrode located in the connection area formed on the first surface. Thus, plasma can be easily generated.Type: ApplicationFiled: February 11, 2015Publication date: August 13, 2015Applicant: Electronics & Telecommunications Research InstituteInventors: Cheol Ho KIM, Kwang Chun LEE
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Publication number: 20150229495Abstract: Disclosed is a technique for a transmission apparatus. A method of generating a differential signal includes adding a predetermined offset to an envelope signal to generate a first signal having the same magnitude as the envelope signal with respect to 0, scaling the first signal at a predetermined rate to generate a second signal, changing a sign of the second signal to generate a third signal that is an inverted signal of the second signal, and forming a differential signal using the second signal and the third signal.Type: ApplicationFiled: February 6, 2015Publication date: August 13, 2015Applicant: Electronics & Telecommunications Research InstituteInventors: Young Kyun CHO, Sung Jun LEE, Seung Hyun JANG, Bong Hyuk PARK, Jae Ho JUNG, Kwang Chun LEE