Patents by Inventor Kwang-Hee Cho

Kwang-Hee Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9935263
    Abstract: An electronic device includes a semiconductor memory. The semiconductor memory includes a selection element layer; a material layer directly coupled to a first surface of the selection element layer and including a conductive filament; and a variable resistance layer coupled to a second surface of the selection element layer opposite to the first surface.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: April 3, 2018
    Assignee: SK HYNIX INC.
    Inventor: Kwang-Hee Cho
  • Patent number: 9401205
    Abstract: An electronic device includes a semiconductor memory unit. The semiconductor memory unit includes a plurality of first lines extending in a first direction, a plurality of second lines extending in a second direction crossing the first direction, and a plurality of memory cells provided between the first lines and the second lines at intersections of the first lines and the second lines. Each of the memory cells includes a variable resistance element coupled to and disposed between a corresponding second line and first and second selection elements, the first selection element coupled to and disposed between the variable resistance element and a corresponding first line, and the second selection element coupled to and disposed between the variable resistance element and the corresponding first line. The first selection element allows a bidirectional current flow therethrough, and the second selection element allows a unidirectional current flow therethrough.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: July 26, 2016
    Assignee: SK HYNIX INC.
    Inventor: Kwang-Hee Cho
  • Patent number: 9373787
    Abstract: A nonvolatile memory device includes an inserted electrode line disposed between a first and a second electrode lines and extending in parallel with the second electrode line. The inserted electrode line is coupled to the second electrode line. A first intermediate pattern disposed between the inserted electrode line and a second intermediate pattern is disposed between the inserted electrode line and the second electrode line. One of the first and second intermediate patterns is a variable resistor and the other of the first and second intermediate patterns is a selector. The first intermediate pattern covers a bottom surface and a portion of sidewalls of the inserted electrode line.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: June 21, 2016
    Assignee: SK HYNIX INC.
    Inventor: Kwang Hee Cho
  • Patent number: 9305976
    Abstract: An electronic device includes a semiconductor memory. The semiconductor memory includes a stack structure including a first electrode, a second electrode, a third electrode, an insulating layer interposed between the first electrode and the second electrode, and a variable resistance layer interposed between the second electrode and the third electrode; and a selection element layer disposed over at least a part of a sidewall of the stack structure.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: April 5, 2016
    Assignee: SK HYNIX INC.
    Inventor: Kwang-Hee Cho
  • Publication number: 20160064659
    Abstract: An electronic device includes a semiconductor memory. The semiconductor memory includes a selection element layer; a material layer directly coupled to a first surface of the selection element layer and including a conductive filament; and a variable resistance layer coupled to a second surface of the selection element layer opposite to the first surface.
    Type: Application
    Filed: February 3, 2015
    Publication date: March 3, 2016
    Inventor: Kwang-Hee CHO
  • Publication number: 20160056211
    Abstract: An electronic device includes a semiconductor memory. The semiconductor memory includes a stack structure including a first electrode, a second electrode, a third electrode, an insulating layer interposed between the first electrode and the second electrode, and a variable resistance layer interposed between the second electrode and the third electrode; and a selection element layer disposed over at least a part of a sidewall of the stack structure.
    Type: Application
    Filed: November 13, 2014
    Publication date: February 25, 2016
    Inventor: Kwang-Hee CHO
  • Patent number: 9246095
    Abstract: An electronic device includes a semiconductor memory unit that includes a vertical electrode formed over a substrate and receiving a voltage through one end of the vertical electrode, a resistance variable layer formed along a side of the vertical electrode to be thinner going from one end to the other end, and a plurality of horizontal electrodes formed adjacent to the vertical electrode with the resistance variable layer disposed between the horizontal electrodes and the vertical electrode, and stacked over the substrate with a space from each other.
    Type: Grant
    Filed: May 17, 2014
    Date of Patent: January 26, 2016
    Assignee: SK HYNIX INC.
    Inventor: Kwang-Hee Cho
  • Patent number: 9196657
    Abstract: An electronic device comprising a semiconductor memory unit that includes a first vertical electrode; a first variable resistance layer surrounding the first vertical electrode; a second vertical electrode surrounding the first variable resistance; a second variable resistance layer surrounding the second vertical electrode; and a plurality of horizontal electrodes contacted with an outer side of the second variable resistance layer, wherein the plurality of horizontal electrodes are spaced apart from each other in a vertical direction.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: November 24, 2015
    Assignee: SK HYNIX INC.
    Inventor: Kwang-Hee Cho
  • Patent number: 9196656
    Abstract: A nonvolatile memory device includes a plurality of first electrode lines including upper portions that have convex top surfaces. A plurality of second electrode lines are disposed over the plurality of first electrode lines to cross the plurality of first electrode lines, and a plurality of memory patterns are disposed between the plurality of first electrode lines and the plurality of second electrode lines.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: November 24, 2015
    Assignee: SK HYNIX INC.
    Inventor: Kwang Hee Cho
  • Publication number: 20150332766
    Abstract: An electronic device includes a semiconductor memory unit. The semiconductor memory unit includes a plurality of first lines extending in a first direction, a plurality of second lines extending in a second direction crossing the first direction, and a plurality of memory cells provided between the first lines and the second lines at intersections of the first lines and the second lines. Each of the memory cells includes a variable resistance element coupled to and disposed between a corresponding second line and first and second selection elements, the first selection element coupled to and disposed between the variable resistance element and a corresponding first line, and the second selection element coupled to and disposed between the variable resistance element and the corresponding first line. The first selection element allows a bidirectional current flow therethrough, and the second selection element allows a unidirectional current flow therethrough.
    Type: Application
    Filed: August 14, 2014
    Publication date: November 19, 2015
    Inventor: Kwang-Hee CHO
  • Publication number: 20150221700
    Abstract: An electronic device comprising a semiconductor memory unit that includes a first vertical electrode; a first variable resistance layer surrounding the first vertical electrode; a second vertical electrode surrounding the first variable resistance; a second variable resistance layer surrounding the second vertical electrode; and a plurality of horizontal electrodes contacted with an outer side of the second variable resistance layer, wherein the plurality of horizontal electrodes are spaced apart from each other in a vertical direction.
    Type: Application
    Filed: September 11, 2014
    Publication date: August 6, 2015
    Inventor: Kwang-Hee CHO
  • Publication number: 20150207069
    Abstract: A nonvolatile memory device includes an inserted electrode line disposed between a first and a second electrode lines and extending in parallel with the second electrode line. The inserted electrode line is coupled to the second electrode line. A first intermediate pattern disposed between the inserted electrode line and a second intermediate pattern is disposed between the inserted electrode line and the second electrode line. One of the first and second intermediate patterns is a variable resistor and the other of the first and second intermediate patterns is a selector. The first intermediate pattern covers a bottom surface and a portion of sidewalls of the inserted electrode line.
    Type: Application
    Filed: June 10, 2014
    Publication date: July 23, 2015
    Inventor: Kwang Hee CHO
  • Publication number: 20150187842
    Abstract: A nonvolatile memory device includes a plurality of first electrode lines including upper portions that have convex top surfaces. A plurality of second electrode lines are disposed over the plurality of first electrode lines to cross the plurality of first electrode lines, and a plurality of memory patterns are disposed between the plurality of first electrode lines and the plurality of second electrode lines.
    Type: Application
    Filed: May 30, 2014
    Publication date: July 2, 2015
    Applicant: SK HYNIX INC.
    Inventor: Kwang Hee CHO
  • Publication number: 20150134858
    Abstract: An electronic device includes a semiconductor memory unit that includes a vertical electrode formed over a substrate and receiving a voltage through one end of the vertical electrode, a resistance variable layer formed along a side of the vertical electrode to be thinner going from one end to the other end, and a plurality of horizontal electrodes formed adjacent to the vertical electrode with the resistance variable layer disposed between the horizontal electrodes and the vertical electrode, and stacked over the substrate with a space from each other.
    Type: Application
    Filed: May 17, 2014
    Publication date: May 14, 2015
    Applicant: SK HYNIX INC.
    Inventor: Kwang-Hee CHO
  • Patent number: 8599989
    Abstract: Provided is a modular reactor head area assembly. The modular reactor head area assembly is installed on a reactor head, and includes: a seismic support structure that performs functions of lifting, moving and reinstallation of the reactor head and control rod driving apparatuses, cooling of the control rod driving apparatuses, shielding of missile parts, and supporting with respect to a seismic load, and disperses a load applied to the control rod driving apparatuses; an upper module that is an assembly of components located at an upper portion of the seismic support structure for the control rod driving apparatuses; and a lower module that is an assembly of components located at a lower portion of the seismic support structure for the control rod driving apparatuses. The upper module and the lower module are 252 detachably coupled to each other so that maintenance of the control rod driving apparatus can be performed easily.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: December 3, 2013
    Assignee: Korea Power Engineering Company, Inc.
    Inventors: Tae-Kyo Kang, Hyun-Min Kim, Young-Ju Kwon, Kwang-Hee Cho, Ki-Seok Yoon, In-Yong Kim, Yeon-Ho Cho, Myoung-Goo Lee
  • Publication number: 20100098205
    Abstract: Provided is a modular reactor head area assembly. The modular reactor head area assembly is installed on a reactor head, and includes: a seismic support structure that performs functions of lifting, moving and reinstallation of the reactor head and control rod driving apparatuses, cooling of the control rod driving apparatuses, shielding of missile parts, and supporting with respect to a seismic load, and disperses a load applied to the control rod driving apparatuses; an upper module that is an assembly of components located at an upper portion of the seismic support structure for the control rod driving apparatuses; and a lower module that is an assembly of components located at a lower portion of the seismic support structure for the control rod driving apparatuses. The upper module and the lower module are 252 detachably coupled to each other so that maintenance of the control rod driving apparatus can be performed easily.
    Type: Application
    Filed: December 31, 2007
    Publication date: April 22, 2010
    Inventors: Tae-Kyo Kang, Hyun-Min Kim, Young-Ju Kwon, Kwang-Hee Cho, Ki-Seok Yoon, In-Yong Kim, Yeon-Ho Cho, Myoung-Goo Lee