Abstract: A semiconductor memory device includes a third insulating pattern and a first insulating pattern on a substrate, the third insulating pattern and the first insulating pattern being spaced apart from each other in a first direction that is perpendicular to the substrate such that a bottom surface of the third insulating pattern and a top surface of the first insulating pattern face each other, a gate electrode between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and including a first side extending between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and a second insulating pattern that protrudes from the first side of the gate electrode by a second width in a second direction, the second direction being different from the first direction.

Abstract: An apparatus for predicting performance of a wheel in a vehicle: includes a learning device that generates a latent space for a plurality of two-dimensional (2D) wheel images based on a convolutional autoencoder (CAE), extracts a predetermined number of the plurality of 2D wheel images from the latent space, and learns a dataset having the plurality of 2D wheel images and performance values corresponding to the plurality of 2D wheel images; and a controller that predicts performance for the plurality of 2D wheel images based on a performance prediction model obtained by the learning device.

Abstract: A liquid crystal display device is provided. The liquid crystal display device includes: a lower substrate having a first and a second common voltage supplying line, pixel regions defined by a plurality of gate lines and a plurality of data lines and arranged in a matrix, and a plurality of common lines electrically connected to the second common voltage supplying line and arranged to be parallel to each of the gate lines; an upper substrate disposed to face the lower substrate and having a common electrode electrically connected to the first common voltage supplying line; a dot for electrically connecting the first common voltage supplying line and the common electrode; and a common voltage generator for generating a first and a second common voltage for independently supplying the first and the second common voltage to the first and the second common voltage supplying line.

Abstract: An operating unit of an LCD panel and a method for operating the same are disclosed, to improve the picture quality by removing superior polarity. The operating unit includes a plurality of data driver ICs for supplying data to the data lines of the LCD panel, a plurality of gate driver ICs for sequentially operating the gate lines of the LCD panel, and a timing controller for supplying polarity control signals having opposite polarities respectively to first and second blocks of the data driver ICs formed by dividing the data driver ICs into multiple blocks.

Abstract: An array substrate for liquid crystal display devices includes first and second gate lines spaced apart from each other, a common line between the first and second gate lines parallel to the first and second gate lines, a data line crossing the first and second gate lines to define first and second pixel regions with respect to the common line, a first thin film transistor at a crossing portion of the first gate line and the data line, a second thin film transistor at a crossing portion of the second gate line and the data line, a first pixel electrode connected to the first thin film transistor in the first pixel region, and a second pixel electrode connected to the second thin film transistor in the second pixel region, wherein the first and second pixel electrodes have a symmetric shape with respect to the common line.

Abstract: A liquid crystal display device is provided. The liquid crystal display device includes: a lower substrate having a first and a second common voltage supplying line, pixel regions defined by a plurality of gate lines and a plurality of data lines and arranged in a matrix, and a plurality of common lines electrically connected to the second common voltage supplying line and arranged to be parallel to each of the gate lines; an upper substrate disposed to face the lower substrate and having a common electrode electrically connected to the first common voltage supplying line; a dot for electrically connecting the first common voltage supplying line and the common electrode; and a common voltage generator for generating a first and a second common voltage for independently supplying the first and the second common voltage to the first and the second common voltage supplying line.