Abstract: The present technology relates to a memory device and a method of operating the memory device. The memory device includes a memory block including a plurality of memory cells corresponding to a plurality of word line groups, a source line driver configured to apply an erase voltage to a source line of the memory block during an erase operation, a voltage generation circuit configured to apply an operation voltage increasing from a first operation voltage to a second operation voltage to the plurality of word line groups during the erase operation, and a control logic configured to control the source line driver and the voltage generation circuit to perform a suspend operation of stopping the erase operation.

Abstract: A semiconductor memory device, and a method of operating the same, includes a memory cell array, a peripheral circuit, and control logic. The memory cell array includes a plurality of memory blocks coupled to a common source line. The peripheral circuit performs a program operation on a memory block selected from among the memory blocks. The control logic controls the program operation of the peripheral circuit. The memory blocks are coupled to corresponding source select lines, respectively. The program operation includes a plurality of program loops, each including a channel precharge operation. During the channel precharge operation, the control logic controls the peripheral circuit so that the common source line floats and a voltage of a source select line coupled to an unselected memory block, among the memory blocks, is increased.

Abstract: A semiconductor memory device, and a method of operating the same, includes a memory cell array, a peripheral circuit, and control logic. The memory cell array includes a plurality of memory blocks coupled to a common source line. The peripheral circuit performs a program operation on a memory block selected from among the memory blocks. The control logic controls the program operation of the peripheral circuit. The memory blocks are coupled to corresponding source select lines, respectively. The program operation includes a plurality of program loops, each including a channel precharge operation. During the channel precharge operation, the control logic controls the peripheral circuit so that the common source line floats and a voltage of a source select line coupled to an unselected memory block, among the memory blocks, is increased.

Abstract: The present technology relates to a memory device and a method of operating the memory device. The memory device includes a memory block including a plurality of memory cells corresponding to a plurality of word line groups, a source line driver configured to apply an erase voltage to a source line of the memory block during an erase operation, a voltage generation circuit configured to apply an operation voltage increasing from a first operation voltage to a second operation voltage to the plurality of word line groups during the erase operation, and a control logic configured to control the source line driver and the voltage generation circuit to perform a suspend operation of stopping the erase operation.

Abstract: The present invention relates to a novel method for preparing lithium bis(fluorosulfonyl)imide and, more specifically, to a method for preparing lithium bis(fluorosulfonyl)imide, capable of simply and economically preparing lithium bis(fluorosulfonyl)imide, which is a lithium salt to be used in an electrolyte solution for a lithium secondary battery, in a high yield and with high purity. According to the present invention, the novel method for preparing lithium bis(fluorosulfonyl)imide can resolve the problem of a conventional technique by reacting a bis(chlorosulfonyl)imide compound, which is a starting material, with a fluorination reagent, and then immediately treating the same with an alkali reagent without purification or concentration, and has an effect of enabling lithium bis(fluorosulfonyl)imide to be simply and economically prepared in a high yield and with high purity.

Abstract: Selected memory cells are programmed by a method of operating a semiconductor memory device. The method includes setting a state of bit lines connected to a selected memory block including the selected memory cells; applying a turn-on voltage to a drain select line connected to the selected memory block, and applying a turn-off voltage to a source select line connected to the memory block; starting to increase a voltage of word lines of a first group of word lines including unselected word lines which are not connected to the selected memory cells and a selected word line connected to the selected memory cells, among a plurality of word lines connected to the selected memory block; and starting to increase a voltage of word lines of a second group of word lines, not included in the first group of word lines, including unselected word lines connected to the selected memory block.

Abstract: A semiconductor memory device, and a method of operating the same, includes a memory cell array, a peripheral circuit, and control logic. The memory cell array includes a plurality of memory blocks coupled to a common source line. The peripheral circuit performs a program operation on a memory block selected from among the memory blocks. The control logic controls the program operation of the peripheral circuit. The memory blocks are coupled to corresponding source select lines, io respectively, The program operation includes a plurality of program loops, each including a channel precharge operation. During the channel precharge operation, the control logic controls the peripheral circuit so that the common source line floats and a voltage of a source select line coupled to an unselected memory block, among the memory blocks, is increased.

Abstract: A semiconductor memory device includes a memory block, a peripheral circuit, and control logic. The memory block includes dummy memory cells connected to dummy word lines and normal memory cells connected to normal word lines. The peripheral circuit performs an erase operation on the memory block. The control logic controls an operation of the peripheral circuit. The control logic controls the peripheral circuit to perform a pre-program operation on first dummy memory cells connected to first dummy word lines among the dummy word lines, in response to an erase command for the memory block, and perform a pre-program operation on second dummy memory cells connected to second dummy word lines among the dummy word lines, after the pre-program operation on the first dummy memory cells. The control logic controls the peripheral circuit to perform an erase operation on the normal memory cells.

Abstract: The present invention relates to a novel method for preparing lithium bis(fluorosulfonyl)imide and, more specifically, to a method for preparing lithium bis(fluorosulfonyl)imide, capable of simply and economically preparing lithium bis(fluorosulfonyl)imide, which is a lithium salt to be used in an electrolyte solution for a lithium secondary battery, in a high yield and with high purity. According to the present invention, the novel method for preparing lithium bis(fluorosulfonyl)imide can resolve the problem of a conventional technique by reacting a bis(chlorosulfonyl)imide compound, which is a starting material, with a fluorination reagent, and then immediately treating the same with an alkali reagent without purification or concentration, and has an effect of enabling lithium bis(fluorosulfonyl)imide to be simply and economically prepared in a high yield and with high purity.

Abstract: Polyalkylene guanidine salts or polyalkylene biguanidine salts having a branched silane compound of formula I show excellent antimicrobial activity and can be applied to various materials including fibers, wood, paper, glass, resins and metals: ##STR1## wherein A is oxyethylene, oxypropylene, oxybutylene, oxystyrene, diphenylsulfone, diphenyl sulfide or alkylamide, which repeating number is 1 to 100,000, or straight or branched alkyl chain containing 1 to 20 carbon atoms;Y represents a blank, HCl, HBr, HI, HNO.sub.