Abstract: An electronic device may have a display with touch sensors. One or more shielding layers may be interposed between the display and the touch sensors. The display may include transistors with gate conductors, a first planarization layer formed over the gate conductors, one or more contacts formed in a first source-drain layer within the first planarization layer, a second planarization layer formed on the first planarization layer, one or more data lines formed in a second source-drain layer within the second planarization layer, a third planarization layer formed on the second planarization layer, and a data line shielding structure formed at least partly in a third source-drain layer within the third planarization layer. The data line shielding structure may be a routing line, a blanket layer, a mesh layer formed in one or more metal layers, and/or a data line covering another data line.

Abstract: An automated gas supply system includes a gas cylinder transfer unit configured to transfer a cradle in which one or more gas cylinders storing a gas therein are stored; a gas cylinder inspection unit configured to check properties of the gas stored in the gas cylinder transferred from the gas cylinder transfer unit and check whether the gas leaks from the gas cylinder; a storage queue configured to receive the gas cylinder from the gas cylinder inspection unit by a mobile robot and configured to classify and store the transferred gas cylinders according to the properties of the gas stored in the gas cylinder; and a gas cabinet configured to receive the gas cylinder from the storage queue by the mobile robot and fasten a gas pipe, which is connected to a semiconductor manufacturing process line, to a gas spray nozzle, which is disposed at one side of the received gas cylinder, to supply the gas stored in the gas cylinder to the semiconductor manufacturing process line, wherein the gas cabinet includes a resid

Abstract: A transistor substrate may include a substrate including a first region and a second region, a first buffer layer disposed in the first region on the substrate and including silicon nitride, a second buffer layer disposed in the first region and the second region on the first buffer layer and including silicon oxide, a first transistor disposed in the first region on the second buffer layer and including a first oxide semiconductor layer and a first gate electrode overlapping the first oxide semiconductor layer, and a second transistor disposed in the second region on the second buffer layer and including a second oxide semiconductor layer and a second gate electrode overlapping the second oxide semiconductor layer.