Patents by Inventor KwangSik JEONG

KwangSik JEONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250218874
    Abstract: Disclosed in the present invention is an analysis method for a semiconductor device, and an analysis device therefor, the analysis method comprising: manufacturing a semiconductor device; supplying a first optical signal to the semiconductor device; detecting a second optical signal reflected from the semiconductor device; and determining pass or fail for the semiconductor device by analyzing the second optical signal, wherein the determination of the pass or fail for the semiconductor device by analyzing the second optical signal comprises: measuring an electrical characteristic of the semiconductor device; correlating the electrical characteristic with the second optical signal; and determining pass or fail for the semiconductor device from the electrical characteristic, and the electrical characteristic is a threshold voltage of the semiconductor device.
    Type: Application
    Filed: April 3, 2023
    Publication date: July 3, 2025
    Applicant: Dongguk University Industry-Academic Cooperation Foundation
    Inventors: Kwunbum CHUNG, Kwangsik JEONG, Hyunmin HONG
  • Patent number: 10283611
    Abstract: An electronic device may include a topological insulating layer including first and second surfaces facing each other and a transition metal oxide layer provided on the first surface of the topological insulating layer. The topological insulating layer may have a thickness ranging from 1 nm to 10 nm.
    Type: Grant
    Filed: July 25, 2017
    Date of Patent: May 7, 2019
    Assignee: Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: MannHo Cho, KwangSik Jeong, DaeHong Ko, DongHyeok Lim, TaeHyeon Kim
  • Publication number: 20180090592
    Abstract: An electronic device may include a topological insulating layer including first and second surfaces facing each other and a transition metal oxide layer provided on the first surface of the topological insulating layer. The topological insulating layer may have a thickness ranging from 1 nm to 10 nm.
    Type: Application
    Filed: July 25, 2017
    Publication date: March 29, 2018
    Applicant: Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: MannHo CHO, KwangSik JEONG, DaeHong KO, DongHyeok LIM, TaeHyeon KIM