Abstract: A power supply system may include a target device and an adapter. The target device may include an adapter connection switch that receives adapter recognition information to form a connection with the adapter, a voltage detection unit that receives an output voltage from an adapter, and a voltage-change-requesting unit that outputs a voltage to request a voltage change based on information on the output voltage from the adapter. The adapter may include a device information recognition unit that receives the voltage to request a voltage change, and an output-voltage-changing unit that changes the output voltage based on the voltage to request a voltage change.

Abstract: An energy storage module includes: a cover member including an internal receiving space configured to accommodate battery cells each including a vent; a top plate coupled to a top of the cover member and including ducts respectively corresponding to the vents of the battery cells; a top cover coupled to a top portion of the top plate and including discharge holes located in an exhaust area and respectively corresponding to the ducts; and an extinguisher sheet located between the top cover and the top plate, and configured to emit a fire extinguishing agent at a temperature exceeding a reference temperature, and the top cover includes protrusion parts located on a bottom surface of the top cover, covering the exhaust area, and coupled to an exterior of the ducts.

Abstract: A method of calculating a collision risk of a ship according to an embodiment of the present disclosure may include: calculating an available velocity area based on maneuvering performance of a host ship; calculating a velocity obstacle area where there is a possibility of collision between an object and the host ship; and calculating a collision risk based on at least one of the available velocity area, the velocity obstacle area, and a preset weight.

Abstract: The present invention relates to a method for dipping an adhesive material, and the method for dipping an adhesive material includes dipping an adhesive material onto a first dipping stamp, transferring the adhesive material, which is dipped onto the first dipping stamp, to a target substrate, and transferring a device to the target substrate, to which the adhesive material is transferred.

Abstract: A device according to an aspect includes a memory in which at least one program is stored and at least one processor configured to execute the at least one program, wherein the at least one processor obtains information about a candidate object using a distance detection sensor, obtains an image of the candidate object using an image capturing sensor, determines whether the candidate object is a real object using the image of the candidate object, and displays a marker containing information about the candidate object determined to be a real object on a monitoring image.

Abstract: The present invention relates to a method and system for predicting treatment responsiveness to an anticancer agent by using the CODRP index, which is an anticancer agent susceptibility index obtained by calculating Z-scores of each of the cell growth factor and drug response factor, integrating the same and converting the calculated values into Z-scores. Since the method for predicting susceptibility to an anticancer agent according to the present invention predicts susceptibility to an anticancer agent based on multiple factors of the drug response factor and cell growth factor, the prediction accuracy is improved compared to the conventional method for predicting susceptibility to an anticancer agent, and by predicting and providing appropriate treatment methods to individual cancer patients at an early stage, it has the advantage of reducing the pain of cancer patients during the treatment process by minimizing the trial and error of the medical personnel in selecting anticancer agents.

Abstract: Provided is a method of fabricating a semiconductor package. The method of fabricating the semiconductor package include preparing a lower element including a lower substrate, a lower electrode, an UBM layer, and a reducing agent layer, providing an upper element including an upper substrate, an upper electrode, and a solder bump layer, providing a pressing member on the upper substrate to press the upper substrate to the lower substrate, and providing a laser beam passing through the pressing member to bond the upper element to the lower element.

Abstract: A semiconductor chip package and a method of fabricating a semiconductor chip package provide a reduced chip size package. The semiconductor chip package includes a semiconductor chip; a plurality of pads disposed on an upper surface of the semiconductor chip; a thermosetting resin formed on the upper surface of the semiconductor chip such that through-holes in the thermosetting resin expose the pads; a multi-layer wiring pattern formed on the thermosetting resin; a connecting unit electrically connecting the multi-layer wiring pattern with the pads; a solder resist on the thermosetting resin, the multi-layer wiring pattern and the connecting unit, such that at least one through-hole in the solder resist exposes a portion of the multi-layer wiring pattern; and a solder ball mounted on the through-hole of the solder resist in contact with the exposed portion of the metal pattern.

Abstract: A semiconductor chip package and a method of fabricating a semiconductor chip package provide a reduced chip size package. The semiconductor chip package includes a semiconductor chip; a plurality of pads disposed on an upper surface of the semiconductor chip; a thermosetting resin formed on the upper surface of the semiconductor chip such that through-holes in the thermosetting resin expose the pads; a multi-layer wiring pattern formed on the thermosetting resin; a connecting unit electrically connecting the multi-layer wiring pattern with the pads; a solder resist on the thermosetting resin, the multi-layer wiring pattern and the connecting unit, such that at least one through-hole in the solder resist exposes a portion of the multi-layer wiring pattern; and a solder ball mounted on the through-hole of the solder resist in contact with the exposed portion of the metal pattern.

Abstract: A semiconductor chip package and a method of fabricating a semiconductor chip package provide a reduced chip size package. The semiconductor chip package includes a semiconductor chip; a plurality of pads disposed on an upper surface of the semiconductor chip; a thermosetting resin formed on the upper surface of the semiconductor chip such that through-holes in the thermosetting resin expose the pads; a multi-layer wiring pattern formed on the thermosetting resin; a connecting unit electrically connecting the multi-layer wiring pattern with the pads; a solder resist on the thermosetting resin and at least on of the multi-layer wiring pattern and the connecting unit, such that at least one through-hole in the solder resist exposes a portion of at least one of the multi-layer wiring pattern and the connecting unit; and a solder ball mounted on the through-hole of the solder resist in contact with the exposed portion of the at least one of the multi-wiring pattern and the connecting unit.

Abstract: The present invention relates to a ball grid array (BGA) semiconductor package member and its manufacturing method employing a carrier frame and a substrate, and to a method of manufacturing a BGA semiconductor package using the BGA semiconductor package member. In manufacturing the conventional BGA semiconductor package, conventional package manufacturing equipment cannot be employed because a boat is used during processing which requires additional equipment, and thus increases the costs of production. However, a BGA semiconductor package manufacturing method employing a carrier frame and substrate according to the present invention is compatible with conventional semiconductor package manufacturing equipment.